Commit 4de38bfe authored by dcarney's avatar dcarney Committed by Commit bot

[turbofan] remove spill slot reuse flag

BUG=

Review URL: https://codereview.chromium.org/837173002

Cr-Commit-Position: refs/heads/master@{#25970}
parent 05bcc2fb
...@@ -584,11 +584,11 @@ struct AllocateDoubleRegistersPhase { ...@@ -584,11 +584,11 @@ struct AllocateDoubleRegistersPhase {
}; };
struct ReuseSpillSlotsPhase { struct AssignSpillSlotsPhase {
static const char* phase_name() { return "reuse spill slots"; } static const char* phase_name() { return "assign spill slots"; }
void Run(PipelineData* data, Zone* temp_zone) { void Run(PipelineData* data, Zone* temp_zone) {
data->register_allocator()->ReuseSpillSlots(); data->register_allocator()->AssignSpillSlots();
} }
}; };
...@@ -1036,9 +1036,8 @@ void Pipeline::AllocateRegisters(const RegisterConfiguration* config, ...@@ -1036,9 +1036,8 @@ void Pipeline::AllocateRegisters(const RegisterConfiguration* config,
} }
Run<AllocateGeneralRegistersPhase>(); Run<AllocateGeneralRegistersPhase>();
Run<AllocateDoubleRegistersPhase>(); Run<AllocateDoubleRegistersPhase>();
if (FLAG_turbo_reuse_spill_slots) { Run<AssignSpillSlotsPhase>();
Run<ReuseSpillSlotsPhase>();
}
Run<CommitAssignmentPhase>(); Run<CommitAssignmentPhase>();
Run<PopulatePointerMapsPhase>(); Run<PopulatePointerMapsPhase>();
Run<ConnectRangesPhase>(); Run<ConnectRangesPhase>();
......
...@@ -897,9 +897,7 @@ void SpillRange::MergeDisjointIntervals(UseInterval* other) { ...@@ -897,9 +897,7 @@ void SpillRange::MergeDisjointIntervals(UseInterval* other) {
} }
void RegisterAllocator::ReuseSpillSlots() { void RegisterAllocator::AssignSpillSlots() {
DCHECK(FLAG_turbo_reuse_spill_slots);
// Merge disjoint spill ranges // Merge disjoint spill ranges
for (size_t i = 0; i < spill_ranges().size(); i++) { for (size_t i = 0; i < spill_ranges().size(); i++) {
auto range = spill_ranges()[i]; auto range = spill_ranges()[i];
...@@ -942,7 +940,6 @@ void RegisterAllocator::CommitAssignment() { ...@@ -942,7 +940,6 @@ void RegisterAllocator::CommitAssignment() {
SpillRange* RegisterAllocator::AssignSpillRangeToLiveRange(LiveRange* range) { SpillRange* RegisterAllocator::AssignSpillRangeToLiveRange(LiveRange* range) {
DCHECK(FLAG_turbo_reuse_spill_slots);
auto spill_range = new (local_zone()) SpillRange(range, local_zone()); auto spill_range = new (local_zone()) SpillRange(range, local_zone());
spill_ranges().push_back(spill_range); spill_ranges().push_back(spill_range);
return spill_range; return spill_range;
...@@ -950,7 +947,6 @@ SpillRange* RegisterAllocator::AssignSpillRangeToLiveRange(LiveRange* range) { ...@@ -950,7 +947,6 @@ SpillRange* RegisterAllocator::AssignSpillRangeToLiveRange(LiveRange* range) {
bool RegisterAllocator::TryReuseSpillForPhi(LiveRange* range) { bool RegisterAllocator::TryReuseSpillForPhi(LiveRange* range) {
DCHECK(FLAG_turbo_reuse_spill_slots);
if (range->IsChild() || !range->is_phi()) return false; if (range->IsChild() || !range->is_phi()) return false;
DCHECK(range->HasNoSpillType()); DCHECK(range->HasNoSpillType());
...@@ -1348,12 +1344,10 @@ void RegisterAllocator::ProcessInstructions(const InstructionBlock* block, ...@@ -1348,12 +1344,10 @@ void RegisterAllocator::ProcessInstructions(const InstructionBlock* block,
void RegisterAllocator::ResolvePhis(const InstructionBlock* block) { void RegisterAllocator::ResolvePhis(const InstructionBlock* block) {
for (auto phi : block->phis()) { for (auto phi : block->phis()) {
if (FLAG_turbo_reuse_spill_slots) { auto res = phi_map_.insert(
auto res = phi_map_.insert( std::make_pair(phi->virtual_register(), PhiMapValue(phi, block)));
std::make_pair(phi->virtual_register(), PhiMapValue(phi, block))); DCHECK(res.second);
DCHECK(res.second); USE(res);
USE(res);
}
auto output = phi->output(); auto output = phi->output();
int phi_vreg = phi->virtual_register(); int phi_vreg = phi->virtual_register();
if (!FLAG_turbo_delay_ssa_decon) { if (!FLAG_turbo_delay_ssa_decon) {
...@@ -1934,11 +1928,7 @@ void RegisterAllocator::AllocateRegisters() { ...@@ -1934,11 +1928,7 @@ void RegisterAllocator::AllocateRegisters() {
} }
} }
if (FLAG_turbo_reuse_spill_slots) { if (TryReuseSpillForPhi(current)) continue;
if (TryReuseSpillForPhi(current)) {
continue;
}
}
for (size_t i = 0; i < active_live_ranges().size(); ++i) { for (size_t i = 0; i < active_live_ranges().size(); ++i) {
auto cur_active = active_live_ranges()[i]; auto cur_active = active_live_ranges()[i];
...@@ -2067,36 +2057,9 @@ bool RegisterAllocator::UnhandledIsSorted() { ...@@ -2067,36 +2057,9 @@ bool RegisterAllocator::UnhandledIsSorted() {
} }
void RegisterAllocator::FreeSpillSlot(LiveRange* range) {
DCHECK(!FLAG_turbo_reuse_spill_slots);
// Check that we are the last range.
if (range->next() != nullptr) return;
if (!range->TopLevel()->HasSpillOperand()) return;
auto spill_operand = range->TopLevel()->GetSpillOperand();
if (spill_operand->IsConstant()) return;
if (spill_operand->index() >= 0) {
reusable_slots().push_back(range);
}
}
InstructionOperand* RegisterAllocator::TryReuseSpillSlot(LiveRange* range) {
DCHECK(!FLAG_turbo_reuse_spill_slots);
if (reusable_slots().empty()) return nullptr;
if (reusable_slots().front()->End().Value() >
range->TopLevel()->Start().Value()) {
return nullptr;
}
auto result = reusable_slots().front()->TopLevel()->GetSpillOperand();
reusable_slots().erase(reusable_slots().begin());
return result;
}
void RegisterAllocator::ActiveToHandled(LiveRange* range) { void RegisterAllocator::ActiveToHandled(LiveRange* range) {
RemoveElement(&active_live_ranges(), range); RemoveElement(&active_live_ranges(), range);
TraceAlloc("Moving live range %d from active to handled\n", range->id()); TraceAlloc("Moving live range %d from active to handled\n", range->id());
if (!FLAG_turbo_reuse_spill_slots) FreeSpillSlot(range);
} }
...@@ -2110,7 +2073,6 @@ void RegisterAllocator::ActiveToInactive(LiveRange* range) { ...@@ -2110,7 +2073,6 @@ void RegisterAllocator::ActiveToInactive(LiveRange* range) {
void RegisterAllocator::InactiveToHandled(LiveRange* range) { void RegisterAllocator::InactiveToHandled(LiveRange* range) {
RemoveElement(&inactive_live_ranges(), range); RemoveElement(&inactive_live_ranges(), range);
TraceAlloc("Moving live range %d from inactive to handled\n", range->id()); TraceAlloc("Moving live range %d from inactive to handled\n", range->id());
if (!FLAG_turbo_reuse_spill_slots) FreeSpillSlot(range);
} }
...@@ -2479,21 +2441,7 @@ void RegisterAllocator::Spill(LiveRange* range) { ...@@ -2479,21 +2441,7 @@ void RegisterAllocator::Spill(LiveRange* range) {
TraceAlloc("Spilling live range %d\n", range->id()); TraceAlloc("Spilling live range %d\n", range->id());
auto first = range->TopLevel(); auto first = range->TopLevel();
if (first->HasNoSpillType()) { if (first->HasNoSpillType()) {
if (FLAG_turbo_reuse_spill_slots) { AssignSpillRangeToLiveRange(first);
AssignSpillRangeToLiveRange(first);
} else {
auto op = TryReuseSpillSlot(range);
if (op == nullptr) {
// Allocate a new operand referring to the spill slot.
RegisterKind kind = range->Kind();
int index = frame()->AllocateSpillSlot(kind == DOUBLE_REGISTERS);
auto op_kind = kind == DOUBLE_REGISTERS
? InstructionOperand::DOUBLE_STACK_SLOT
: InstructionOperand::STACK_SLOT;
op = new (code_zone()) InstructionOperand(op_kind, index);
}
first->SetSpillOperand(op);
}
} }
range->MakeSpilled(); range->MakeSpilled();
} }
......
...@@ -403,8 +403,8 @@ class RegisterAllocator FINAL : public ZoneObject { ...@@ -403,8 +403,8 @@ class RegisterAllocator FINAL : public ZoneObject {
void AllocateGeneralRegisters(); void AllocateGeneralRegisters();
void AllocateDoubleRegisters(); void AllocateDoubleRegisters();
// Phase 5: reassign spill splots for maximal reuse. // Phase 5: assign spill splots.
void ReuseSpillSlots(); void AssignSpillSlots();
// Phase 6: commit assignment. // Phase 6: commit assignment.
void CommitAssignment(); void CommitAssignment();
...@@ -484,8 +484,6 @@ class RegisterAllocator FINAL : public ZoneObject { ...@@ -484,8 +484,6 @@ class RegisterAllocator FINAL : public ZoneObject {
bool TryAllocateFreeReg(LiveRange* range); bool TryAllocateFreeReg(LiveRange* range);
void AllocateBlockedReg(LiveRange* range); void AllocateBlockedReg(LiveRange* range);
SpillRange* AssignSpillRangeToLiveRange(LiveRange* range); SpillRange* AssignSpillRangeToLiveRange(LiveRange* range);
void FreeSpillSlot(LiveRange* range);
InstructionOperand* TryReuseSpillSlot(LiveRange* range);
// Live range splitting helpers. // Live range splitting helpers.
......
...@@ -400,8 +400,6 @@ DEFINE_IMPLICATION(turbo_inlining_intrinsics, turbo_inlining) ...@@ -400,8 +400,6 @@ DEFINE_IMPLICATION(turbo_inlining_intrinsics, turbo_inlining)
DEFINE_IMPLICATION(turbo_inlining, turbo_types) DEFINE_IMPLICATION(turbo_inlining, turbo_types)
DEFINE_BOOL(turbo_profiling, false, "enable profiling in TurboFan") DEFINE_BOOL(turbo_profiling, false, "enable profiling in TurboFan")
// TODO(dcarney): this is just for experimentation, remove when default. // TODO(dcarney): this is just for experimentation, remove when default.
DEFINE_BOOL(turbo_reuse_spill_slots, true, "reuse spill slots in TurboFan")
// TODO(dcarney): this is just for experimentation, remove when default.
DEFINE_BOOL(turbo_delay_ssa_decon, false, DEFINE_BOOL(turbo_delay_ssa_decon, false,
"delay ssa deconstruction in TurboFan register allocator") "delay ssa deconstruction in TurboFan register allocator")
// TODO(dcarney): this is just for debugging, remove eventually. // TODO(dcarney): this is just for debugging, remove eventually.
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment