Commit 4dbbee3d authored by Ng Zhi An's avatar Ng Zhi An Committed by Commit Bot

[wasm-simd] Add AVX codegen for load extends

Bug: v8:9886
Change-Id: I711bc0c8d1a9625eb3b2ecd38a44fb201aef153e
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1985031
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Reviewed-by: 's avatarDeepti Gandluri <gdeepti@chromium.org>
Cr-Commit-Position: refs/heads/master@{#65589}
parent 7cfbcefb
...@@ -227,6 +227,12 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase { ...@@ -227,6 +227,12 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
AVX_OP_SSE4_1(Insertps, insertps) AVX_OP_SSE4_1(Insertps, insertps)
AVX_OP_SSE4_1(Pinsrq, pinsrq) AVX_OP_SSE4_1(Pinsrq, pinsrq)
AVX_OP_SSE4_1(Pblendw, pblendw) AVX_OP_SSE4_1(Pblendw, pblendw)
AVX_OP_SSE4_1(Pmovsxbw, pmovsxbw)
AVX_OP_SSE4_1(Pmovsxwd, pmovsxwd)
AVX_OP_SSE4_1(Pmovsxdq, pmovsxdq)
AVX_OP_SSE4_1(Pmovzxbw, pmovzxbw)
AVX_OP_SSE4_1(Pmovzxwd, pmovzxwd)
AVX_OP_SSE4_1(Pmovzxdq, pmovzxdq)
#undef AVX_OP #undef AVX_OP
......
...@@ -3719,37 +3719,37 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( ...@@ -3719,37 +3719,37 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
case kX64I16x8Load8x8S: { case kX64I16x8Load8x8S: {
CpuFeatureScope sse_scope(tasm(), SSE4_1); CpuFeatureScope sse_scope(tasm(), SSE4_1);
EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset());
__ pmovsxbw(i.OutputSimd128Register(), i.MemoryOperand()); __ Pmovsxbw(i.OutputSimd128Register(), i.MemoryOperand());
break; break;
} }
case kX64I16x8Load8x8U: { case kX64I16x8Load8x8U: {
CpuFeatureScope sse_scope(tasm(), SSE4_1); CpuFeatureScope sse_scope(tasm(), SSE4_1);
EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset());
__ pmovzxbw(i.OutputSimd128Register(), i.MemoryOperand()); __ Pmovzxbw(i.OutputSimd128Register(), i.MemoryOperand());
break; break;
} }
case kX64I32x4Load16x4S: { case kX64I32x4Load16x4S: {
CpuFeatureScope sse_scope(tasm(), SSE4_1); CpuFeatureScope sse_scope(tasm(), SSE4_1);
EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset());
__ pmovsxwd(i.OutputSimd128Register(), i.MemoryOperand()); __ Pmovsxwd(i.OutputSimd128Register(), i.MemoryOperand());
break; break;
} }
case kX64I32x4Load16x4U: { case kX64I32x4Load16x4U: {
CpuFeatureScope sse_scope(tasm(), SSE4_1); CpuFeatureScope sse_scope(tasm(), SSE4_1);
EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset());
__ pmovzxwd(i.OutputSimd128Register(), i.MemoryOperand()); __ Pmovzxwd(i.OutputSimd128Register(), i.MemoryOperand());
break; break;
} }
case kX64I64x2Load32x2S: { case kX64I64x2Load32x2S: {
CpuFeatureScope sse_scope(tasm(), SSE4_1); CpuFeatureScope sse_scope(tasm(), SSE4_1);
EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset());
__ pmovsxdq(i.OutputSimd128Register(), i.MemoryOperand()); __ Pmovsxdq(i.OutputSimd128Register(), i.MemoryOperand());
break; break;
} }
case kX64I64x2Load32x2U: { case kX64I64x2Load32x2U: {
CpuFeatureScope sse_scope(tasm(), SSE4_1); CpuFeatureScope sse_scope(tasm(), SSE4_1);
EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset()); EmitOOLTrapIfNeeded(zone(), this, opcode, instr, __ pc_offset());
__ pmovzxdq(i.OutputSimd128Register(), i.MemoryOperand()); __ Pmovzxdq(i.OutputSimd128Register(), i.MemoryOperand());
break; break;
} }
case kX64S32x4Swizzle: { case kX64S32x4Swizzle: {
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment