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Commit 4b6b5537 authored by Milad Fa's avatar Milad Fa Committed by V8 LUCI CQ
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AIX [lifotff]: Fix endianness issue in atomic ops 

result needs to byte-swapped as it's currently in machine
native order and Wasm requires LE ordering.

Change-Id: I9c1d6752fbdaba18fb7a8d49a9848d04c1a21be8
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3303954Reviewed-by: 's avatarJunliang Yan <junyan@redhat.com>
Commit-Queue: Milad Farazmand <mfarazma@redhat.com>
Cr-Commit-Position: refs/heads/main@{#78114}
parent a1e49bf8
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src/wasm/baseline/ppc/liftoff-assembler-ppc.h
View file @ 4b6b5537
......@@ -570,6 +570,9 @@ constexpr bool is_be = false;
} \
}; \
AtomicOps<uint16_t>(dst, value.gp(), result.gp(), r0, op_func); \
if (is_be) { \
ByteReverseU16(result.gp(), result.gp(), ip); \
} \
break; \
} \
case StoreType::kI32Store: \
......@@ -587,6 +590,9 @@ constexpr bool is_be = false;
} \
}; \
AtomicOps<uint32_t>(dst, value.gp(), result.gp(), r0, op_func); \
if (is_be) { \
ByteReverseU32(result.gp(), result.gp(), ip); \
} \
break; \
} \
case StoreType::kI64Store: { \
......@@ -600,6 +606,9 @@ constexpr bool is_be = false;
} \
}; \
AtomicOps<uint64_t>(dst, value.gp(), result.gp(), r0, op_func); \
if (is_be) { \
ByteReverseU64(result.gp(), result.gp()); \
} \
break; \
} \
default: \
......
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