ARM: Fix heap number allocation in lithium-codegen-arm that assumed

that ip can be used as a scratch register. This is not true because
ip is already used for something else in AllocateInNewSpace in the
macro assembler.

Explicitly allocate a temp register for use in the heap number
allocation instead.
Review URL: http://codereview.chromium.org/5788001

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@5967 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

src/arm/lithium-arm.cc

@@ -1691,11 +1691,13 @@ LInstruction* LChunkBuilder::DoChange(HChange* instr) {
   } else if (from.IsDouble()) {
     if (to.IsTagged()) {
       LOperand* value = UseRegister(instr->value());
-      LOperand* temp = TempRegister();
+      LOperand* temp1 = TempRegister();
+      LOperand* temp2 = TempRegister();
 
-      // Make sure that temp and result_temp are different registers.
+      // Make sure that the temp and result_temp registers are
+      // different.
       LUnallocated* result_temp = TempRegister();
-      LInstruction* result = new LNumberTagD(value, temp);
+      LInstruction* result = new LNumberTagD(value, temp1, temp2);
       Define(result, result_temp);
       return AssignPointerMap(result);
     } else {

src/arm/lithium-arm.h

@@ -1395,15 +1395,17 @@ class LNumberTagI: public LUnaryOperation {
 
 class LNumberTagD: public LUnaryOperation {
  public:
-  explicit LNumberTagD(LOperand* value, LOperand* temp)
-      : LUnaryOperation(value), temp_(temp) { }
+  LNumberTagD(LOperand* value, LOperand* temp1, LOperand* temp2)
+      : LUnaryOperation(value), temp1_(temp1), temp2_(temp2) { }
 
   DECLARE_CONCRETE_INSTRUCTION(NumberTagD, "number-tag-d")
 
-  LOperand* temp() const { return temp_; }
+  LOperand* temp1() const { return temp1_; }
+  LOperand* temp2() const { return temp2_; }
 
  private:
-  LOperand* temp_;
+  LOperand* temp1_;
+  LOperand* temp2_;
 };
 
 

src/arm/lithium-codegen-arm.cc

@@ -1733,13 +1733,14 @@ void LCodeGen::DoNumberTagD(LNumberTagD* instr) {
 
   DoubleRegister input_reg = ToDoubleRegister(instr->input());
   Register reg = ToRegister(instr->result());
-  Register tmp = ToRegister(instr->temp());
+  Register temp1 = ToRegister(instr->temp1());
+  Register temp2 = ToRegister(instr->temp2());
   Register scratch = r9;
 
   DeferredNumberTagD* deferred = new DeferredNumberTagD(this, instr);
   if (FLAG_inline_new) {
     __ LoadRoot(scratch, Heap::kHeapNumberMapRootIndex);
-    __ AllocateHeapNumber(reg, tmp, ip, scratch, deferred->entry());
+    __ AllocateHeapNumber(reg, temp1, temp2, scratch, deferred->entry());
   } else {
     __ jmp(deferred->entry());
   }

src/arm/macro-assembler-arm.cc

@@ -1060,9 +1060,14 @@ void MacroAssembler::AllocateInNewSpace(Register object_size,
     return;
   }
 
+  // Assert that the register arguments are different and that none of
+  // them are ip. ip is used explicitly in the code generated below.
   ASSERT(!result.is(scratch1));
   ASSERT(!result.is(scratch2));
   ASSERT(!scratch1.is(scratch2));
+  ASSERT(!result.is(ip));
+  ASSERT(!scratch1.is(ip));
+  ASSERT(!scratch2.is(ip));
 
   // Check relative positions of allocation top and limit addresses.
   // The values must be adjacent in memory to allow the use of LDM.