Commit 45d1c71a authored by Junliang Yan's avatar Junliang Yan Committed by V8 LUCI CQ

ppc: [liftoff] implement 32-bit Mod

Change-Id: I6fb16c82e5c730e35d90a3de6c746f9c4415dc00
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3087725Reviewed-by: 's avatarMilad Fa <mfarazma@redhat.com>
Commit-Queue: Junliang Yan <junyan@redhat.com>
Cr-Commit-Position: refs/heads/master@{#76240}
parent a197c935
......@@ -2780,6 +2780,23 @@ void TurboAssembler::DivU32(Register dst, Register src, Register value, OEBit s,
ZeroExtWord32(dst, dst);
}
void TurboAssembler::ModS64(Register dst, Register src, Register value) {
modsd(dst, src, value);
}
void TurboAssembler::ModU64(Register dst, Register src, Register value) {
modud(dst, src, value);
}
void TurboAssembler::ModS32(Register dst, Register src, Register value) {
modsw(dst, src, value);
extsw(dst, dst);
}
void TurboAssembler::ModU32(Register dst, Register src, Register value) {
moduw(dst, src, value);
ZeroExtWord32(dst, dst);
}
void TurboAssembler::AndU64(Register dst, Register src, const Operand& value,
Register scratch, RCBit r) {
if (is_uint16(value.immediate()) && r == SetRC) {
......
......@@ -209,6 +209,10 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
RCBit r = LeaveRC);
void DivU32(Register dst, Register src, Register value, OEBit s = LeaveOE,
RCBit r = LeaveRC);
void ModS64(Register dst, Register src, Register value);
void ModU64(Register dst, Register src, Register value);
void ModS32(Register dst, Register src, Register value);
void ModU32(Register dst, Register src, Register value);
void AndU64(Register dst, Register src, const Operand& value,
Register scratch = r0, RCBit r = SetRC);
......
......@@ -949,12 +949,33 @@ void LiftoffAssembler::emit_i32_divu(Register dst, Register lhs, Register rhs,
void LiftoffAssembler::emit_i32_rems(Register dst, Register lhs, Register rhs,
Label* trap_div_by_zero) {
bailout(kUnsupportedArchitecture, "i32_rems");
Label cont, done, trap_div_unrepresentable;
// Check for division by zero.
CmpS32(rhs, Operand::Zero(), r0);
beq(trap_div_by_zero);
// Check kMinInt/-1 case.
CmpS32(rhs, Operand(-1), r0);
bne(&cont);
CmpS32(lhs, Operand(kMinInt), r0);
beq(&trap_div_unrepresentable);
// Continue noraml calculation.
bind(&cont);
ModS32(dst, lhs, rhs);
bne(&done);
// trap by kMinInt/-1 case.
bind(&trap_div_unrepresentable);
mov(dst, Operand(0));
bind(&done);
}
void LiftoffAssembler::emit_i32_remu(Register dst, Register lhs, Register rhs,
Label* trap_div_by_zero) {
bailout(kUnsupportedArchitecture, "i32_remu");
CmpS32(rhs, Operand::Zero(), r0);
beq(trap_div_by_zero);
ModU32(dst, lhs, rhs);
}
bool LiftoffAssembler::emit_i64_divs(LiftoffRegister dst, LiftoffRegister lhs,
......
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