Commit 44d0112b authored by whesse@chromium.org's avatar whesse@chromium.org

Add SSE2 instructions to disassembler and movmskpd SSE2 instruction to assembler.

Review URL: http://codereview.chromium.org/865002

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@4110 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
parent d6e08a41
......@@ -2148,6 +2148,17 @@ void Assembler::ucomisd(XMMRegister dst, XMMRegister src) {
}
void Assembler::movmskpd(Register dst, XMMRegister src) {
ASSERT(CpuFeatures::IsEnabled(SSE2));
EnsureSpace ensure_space(this);
last_pc_ = pc_;
EMIT(0x66);
EMIT(0x0F);
EMIT(0x50);
emit_sse_operand(dst, src);
}
void Assembler::movdqa(const Operand& dst, XMMRegister src ) {
ASSERT(CpuFeatures::IsEnabled(SSE2));
EnsureSpace ensure_space(this);
......@@ -2283,6 +2294,11 @@ void Assembler::emit_sse_operand(XMMRegister dst, XMMRegister src) {
}
void Assembler::emit_sse_operand(Register dst, XMMRegister src) {
EMIT(0xC0 | dst.code() << 3 | src.code());
}
void Assembler::Print() {
Disassembler::Decode(stdout, buffer_, pc_);
}
......
......@@ -769,6 +769,7 @@ class Assembler : public Malloced {
void comisd(XMMRegister dst, XMMRegister src);
void ucomisd(XMMRegister dst, XMMRegister src);
void movmskpd(Register dst, XMMRegister src);
void movdqa(XMMRegister dst, const Operand& src);
void movdqa(const Operand& dst, XMMRegister src);
......@@ -828,7 +829,7 @@ class Assembler : public Malloced {
void emit_sse_operand(XMMRegister reg, const Operand& adr);
void emit_sse_operand(XMMRegister dst, XMMRegister src);
void emit_sse_operand(Register dst, XMMRegister src);
private:
byte* addr_at(int pos) { return buffer_ + pos; }
......
......@@ -1069,12 +1069,26 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
} else {
UnimplementedInstruction();
}
} else if (*data == 0x2F) {
} else if (*data == 0x2E || *data == 0x2F) {
const char* mnem = (*data == 0x2E) ? "ucomisd" : "comisd";
data++;
int mod, regop, rm;
get_modrm(*data, &mod, &regop, &rm);
AppendToBuffer("comisd %s,%s",
NameOfXMMRegister(regop),
if (mod == 0x3) {
AppendToBuffer("%s %s,%s", mnem,
NameOfXMMRegister(regop),
NameOfXMMRegister(rm));
data++;
} else {
AppendToBuffer("%s %s,", mnem, NameOfXMMRegister(regop));
data += PrintRightOperand(data);
}
} else if (*data == 0x50) {
data++;
int mod, regop, rm;
get_modrm(*data, &mod, &regop, &rm);
AppendToBuffer("movmskpd %s,%s",
NameOfCPURegister(regop),
NameOfXMMRegister(rm));
data++;
} else if (*data == 0x57) {
......@@ -1198,6 +1212,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
const char* mnem = "?";
switch (b2) {
case 0x2A: mnem = "cvtsi2sd"; break;
case 0x2C: mnem = "cvttsd2si"; break;
case 0x51: mnem = "sqrtsd"; break;
case 0x58: mnem = "addsd"; break;
case 0x59: mnem = "mulsd"; break;
......@@ -1208,14 +1223,38 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
int mod, regop, rm;
get_modrm(*data, &mod, &regop, &rm);
if (b2 == 0x2A) {
AppendToBuffer("%s %s,", mnem, NameOfXMMRegister(regop));
data += PrintRightOperand(data);
if (mod != 0x3) {
AppendToBuffer("%s %s,", mnem, NameOfXMMRegister(regop));
data += PrintRightOperand(data);
} else {
AppendToBuffer("%s %s,%s",
mnem,
NameOfXMMRegister(regop),
NameOfCPURegister(rm));
data++;
}
} else if (b2 == 0x2C) {
if (mod != 0x3) {
AppendToBuffer("%s %s,", mnem, NameOfCPURegister(regop));
data += PrintRightOperand(data);
} else {
AppendToBuffer("%s %s,%s",
mnem,
NameOfCPURegister(regop),
NameOfXMMRegister(rm));
data++;
}
} else {
AppendToBuffer("%s %s,%s",
mnem,
NameOfXMMRegister(regop),
NameOfXMMRegister(rm));
data++;
if (mod != 0x3) {
AppendToBuffer("%s %s,", mnem, NameOfXMMRegister(regop));
data += PrintRightOperand(data);
} else {
AppendToBuffer("%s %s,%s",
mnem,
NameOfXMMRegister(regop),
NameOfXMMRegister(rm));
data++;
}
}
}
} else {
......
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