PPC [liftoff]: Implement simd comparison ops

Change-Id: Id691009bddafdbb5a53c234fe00995b6e0733586
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3893417
Commit-Queue: Milad Farazmand <mfarazma@redhat.com>
Reviewed-by: Junliang Yan <junyan@redhat.com>
Cr-Commit-Position: refs/heads/main@{#83200}

src/codegen/ppc/macro-assembler-ppc.cc

@@ -3684,14 +3684,18 @@ void TurboAssembler::StoreF32LE(DoubleRegister dst, const MemOperand& mem,
   V(F64x2Sub, xvsubdp)     \
   V(F64x2Mul, xvmuldp)     \
   V(F64x2Div, xvdivdp)     \
+  V(F64x2Eq, xvcmpeqdp)    \
   V(F32x4Add, vaddfp)      \
   V(F32x4Sub, vsubfp)      \
   V(F32x4Mul, xvmulsp)     \
   V(F32x4Div, xvdivsp)     \
   V(F32x4Min, vminfp)      \
   V(F32x4Max, vmaxfp)      \
+  V(F32x4Eq, xvcmpeqsp)    \
   V(I64x2Add, vaddudm)     \
   V(I64x2Sub, vsubudm)     \
+  V(I64x2Eq, vcmpequd)     \
+  V(I64x2GtS, vcmpgtsd)    \
   V(I32x4Add, vadduwm)     \
   V(I32x4Sub, vsubuwm)     \
   V(I32x4Mul, vmuluwm)     \
@@ -3699,18 +3703,27 @@ void TurboAssembler::StoreF32LE(DoubleRegister dst, const MemOperand& mem,
   V(I32x4MinU, vminuw)     \
   V(I32x4MaxS, vmaxsw)     \
   V(I32x4MaxU, vmaxuw)     \
+  V(I32x4Eq, vcmpequw)     \
+  V(I32x4GtS, vcmpgtsw)    \
+  V(I32x4GtU, vcmpgtuw)    \
   V(I16x8Add, vadduhm)     \
   V(I16x8Sub, vsubuhm)     \
   V(I16x8MinS, vminsh)     \
   V(I16x8MinU, vminuh)     \
   V(I16x8MaxS, vmaxsh)     \
   V(I16x8MaxU, vmaxuh)     \
+  V(I16x8Eq, vcmpequh)     \
+  V(I16x8GtS, vcmpgtsh)    \
+  V(I16x8GtU, vcmpgtuh)    \
   V(I8x16Add, vaddubm)     \
   V(I8x16Sub, vsububm)     \
   V(I8x16MinS, vminsb)     \
   V(I8x16MinU, vminub)     \
   V(I8x16MaxS, vmaxsb)     \
-  V(I8x16MaxU, vmaxub)
+  V(I8x16MaxU, vmaxub)     \
+  V(I8x16Eq, vcmpequb)     \
+  V(I8x16GtS, vcmpgtsb)    \
+  V(I8x16GtU, vcmpgtub)
 
 #define EMIT_SIMD_BINOP(name, op)                                      \
   void TurboAssembler::name(Simd128Register dst, Simd128Register src1, \
@@ -3996,6 +4009,107 @@ void TurboAssembler::F64x2Max(Simd128Register dst, Simd128Register src1,
 }
 #undef F64X2_MIN_MAX_NAN
 
+void TurboAssembler::F64x2Lt(Simd128Register dst, Simd128Register src1,
+                             Simd128Register src2) {
+  xvcmpgtdp(dst, src2, src1);
+}
+
+void TurboAssembler::F64x2Le(Simd128Register dst, Simd128Register src1,
+                             Simd128Register src2) {
+  xvcmpgedp(dst, src2, src1);
+}
+
+void TurboAssembler::F64x2Ne(Simd128Register dst, Simd128Register src1,
+                             Simd128Register src2, Simd128Register scratch) {
+  xvcmpeqdp(scratch, src1, src2);
+  vnor(dst, scratch, scratch);
+}
+
+void TurboAssembler::F32x4Lt(Simd128Register dst, Simd128Register src1,
+                             Simd128Register src2) {
+  xvcmpgtsp(dst, src2, src1);
+}
+
+void TurboAssembler::F32x4Le(Simd128Register dst, Simd128Register src1,
+                             Simd128Register src2) {
+  xvcmpgesp(dst, src2, src1);
+}
+
+void TurboAssembler::F32x4Ne(Simd128Register dst, Simd128Register src1,
+                             Simd128Register src2, Simd128Register scratch) {
+  xvcmpeqsp(scratch, src1, src2);
+  vnor(dst, scratch, scratch);
+}
+
+void TurboAssembler::I64x2Ne(Simd128Register dst, Simd128Register src1,
+                             Simd128Register src2, Simd128Register scratch) {
+  vcmpequd(scratch, src1, src2);
+  vnor(dst, scratch, scratch);
+}
+
+void TurboAssembler::I64x2GeS(Simd128Register dst, Simd128Register src1,
+                              Simd128Register src2, Simd128Register scratch) {
+  vcmpgtsd(scratch, src2, src1);
+  vnor(dst, scratch, scratch);
+}
+
+void TurboAssembler::I32x4Ne(Simd128Register dst, Simd128Register src1,
+                             Simd128Register src2, Simd128Register scratch) {
+  vcmpequw(scratch, src1, src2);
+  vnor(dst, scratch, scratch);
+}
+
+void TurboAssembler::I32x4GeS(Simd128Register dst, Simd128Register src1,
+                              Simd128Register src2, Simd128Register scratch) {
+  vcmpgtsw(scratch, src2, src1);
+  vnor(dst, scratch, scratch);
+}
+
+void TurboAssembler::I32x4GeU(Simd128Register dst, Simd128Register src1,
+                              Simd128Register src2, Simd128Register scratch) {
+  vcmpequw(scratch, src1, src2);
+  vcmpgtuw(dst, src1, src2);
+  vor(dst, dst, scratch);
+}
+
+void TurboAssembler::I16x8Ne(Simd128Register dst, Simd128Register src1,
+                             Simd128Register src2, Simd128Register scratch) {
+  vcmpequh(scratch, src1, src2);
+  vnor(dst, scratch, scratch);
+}
+
+void TurboAssembler::I16x8GeS(Simd128Register dst, Simd128Register src1,
+                              Simd128Register src2, Simd128Register scratch) {
+  vcmpgtsh(scratch, src2, src1);
+  vnor(dst, scratch, scratch);
+}
+
+void TurboAssembler::I16x8GeU(Simd128Register dst, Simd128Register src1,
+                              Simd128Register src2, Simd128Register scratch) {
+  vcmpequh(scratch, src1, src2);
+  vcmpgtuh(dst, src1, src2);
+  vor(dst, dst, scratch);
+}
+
+void TurboAssembler::I8x16Ne(Simd128Register dst, Simd128Register src1,
+                             Simd128Register src2, Simd128Register scratch) {
+  vcmpequb(scratch, src1, src2);
+  vnor(dst, scratch, scratch);
+}
+
+void TurboAssembler::I8x16GeS(Simd128Register dst, Simd128Register src1,
+                              Simd128Register src2, Simd128Register scratch) {
+  vcmpgtsb(scratch, src2, src1);
+  vnor(dst, scratch, scratch);
+}
+
+void TurboAssembler::I8x16GeU(Simd128Register dst, Simd128Register src1,
+                              Simd128Register src2, Simd128Register scratch) {
+  vcmpequb(scratch, src1, src2);
+  vcmpgtub(dst, src1, src2);
+  vor(dst, dst, scratch);
+}
+
 Register GetRegisterThatIsNotOneOf(Register reg1, Register reg2, Register reg3,
                                    Register reg4, Register reg5,
                                    Register reg6) {

src/codegen/ppc/macro-assembler-ppc.h

@@ -1085,14 +1085,22 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
   V(F64x2Sub)              \
   V(F64x2Mul)              \
   V(F64x2Div)              \
+  V(F64x2Eq)               \
+  V(F64x2Lt)               \
+  V(F64x2Le)               \
   V(F32x4Add)              \
   V(F32x4Sub)              \
   V(F32x4Mul)              \
   V(F32x4Div)              \
   V(F32x4Min)              \
   V(F32x4Max)              \
+  V(F32x4Eq)               \
+  V(F32x4Lt)               \
+  V(F32x4Le)               \
   V(I64x2Add)              \
   V(I64x2Sub)              \
+  V(I64x2Eq)               \
+  V(I64x2GtS)              \
   V(I32x4MinS)             \
   V(I32x4MinU)             \
   V(I32x4MaxS)             \
@@ -1100,6 +1108,9 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
   V(I32x4Add)              \
   V(I32x4Sub)              \
   V(I32x4Mul)              \
+  V(I32x4Eq)               \
+  V(I32x4GtS)              \
+  V(I32x4GtU)              \
   V(I16x8Add)              \
   V(I16x8Sub)              \
   V(I16x8Mul)              \
@@ -1107,12 +1118,18 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
   V(I16x8MinU)             \
   V(I16x8MaxS)             \
   V(I16x8MaxU)             \
+  V(I16x8Eq)               \
+  V(I16x8GtS)              \
+  V(I16x8GtU)              \
   V(I8x16Add)              \
   V(I8x16Sub)              \
   V(I8x16MinS)             \
   V(I8x16MinU)             \
   V(I8x16MaxS)             \
-  V(I8x16MaxU)
+  V(I8x16MaxU)             \
+  V(I8x16Eq)               \
+  V(I8x16GtS)              \
+  V(I8x16GtU)
 
 #define PROTOTYPE_SIMD_BINOP(name) \
   void name(Simd128Register dst, Simd128Register src1, Simd128Register src2);
@@ -1179,6 +1196,32 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
                 Simd128Register scratch1, Simd128Register scratch2);
   void F64x2Max(Simd128Register dst, Simd128Register src1, Simd128Register src2,
                 Simd128Register scratch1, Simd128Register scratch2);
+  void F64x2Ne(Simd128Register dst, Simd128Register src1, Simd128Register src2,
+               Simd128Register scratch);
+  void F32x4Ne(Simd128Register dst, Simd128Register src1, Simd128Register src2,
+               Simd128Register scratch);
+  void I64x2Ne(Simd128Register dst, Simd128Register src1, Simd128Register src2,
+               Simd128Register scratch);
+  void I64x2GeS(Simd128Register dst, Simd128Register src1, Simd128Register src2,
+                Simd128Register scratch);
+  void I32x4Ne(Simd128Register dst, Simd128Register src1, Simd128Register src2,
+               Simd128Register scratch);
+  void I32x4GeS(Simd128Register dst, Simd128Register src1, Simd128Register src2,
+                Simd128Register scratch);
+  void I32x4GeU(Simd128Register dst, Simd128Register src1, Simd128Register src2,
+                Simd128Register scratch);
+  void I16x8Ne(Simd128Register dst, Simd128Register src1, Simd128Register src2,
+               Simd128Register scratch);
+  void I16x8GeS(Simd128Register dst, Simd128Register src1, Simd128Register src2,
+                Simd128Register scratch);
+  void I16x8GeU(Simd128Register dst, Simd128Register src1, Simd128Register src2,
+                Simd128Register scratch);
+  void I8x16Ne(Simd128Register dst, Simd128Register src1, Simd128Register src2,
+               Simd128Register scratch);
+  void I8x16GeS(Simd128Register dst, Simd128Register src1, Simd128Register src2,
+                Simd128Register scratch);
+  void I8x16GeU(Simd128Register dst, Simd128Register src1, Simd128Register src2,
+                Simd128Register scratch);
 
  private:
   static const int kSmiShift = kSmiTagSize + kSmiShiftSize;