[mips64][wasm-simd] Support returning Simd128 on caller's stack

Port 360c9294
https://chromium-review.googlesource.com/c/v8/v8/+/2355189

And support storing kS128 value in liftoff.

Change-Id: I4429088bf6205aa24bfa61c2e4dbaf7bdab79132
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2402431Reviewed-by: Zhi An Ng <zhin@chromium.org>
Commit-Queue: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Cr-Commit-Position: refs/heads/master@{#69830}

src/compiler/backend/mips64/code-generator-mips64.cc

@@ -1810,19 +1810,20 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       }
       break;
     case kMips64Peek: {
-      // The incoming value is 0-based, but we need a 1-based value.
-      int reverse_slot = i.InputInt32(0) + 1;
+      int reverse_slot = i.InputInt32(0);
       int offset =
           FrameSlotToFPOffset(frame()->GetTotalFrameSlotCount() - reverse_slot);
       if (instr->OutputAt(0)->IsFPRegister()) {
         LocationOperand* op = LocationOperand::cast(instr->OutputAt(0));
         if (op->representation() == MachineRepresentation::kFloat64) {
           __ Ldc1(i.OutputDoubleRegister(), MemOperand(fp, offset));
-        } else {
-          DCHECK_EQ(op->representation(), MachineRepresentation::kFloat32);
-          __ lwc1(
+        } else if (op->representation() == MachineRepresentation::kFloat32) {
+          __ Lwc1(
               i.OutputSingleRegister(0),
               MemOperand(fp, offset + kLessSignificantWordInDoublewordOffset));
+        } else {
+          DCHECK_EQ(MachineRepresentation::kSimd128, op->representation());
+          __ ld_b(i.OutputSimd128Register(), MemOperand(fp, offset));
         }
       } else {
         __ Ld(i.OutputRegister(0), MemOperand(fp, offset));

src/compiler/backend/mips64/instruction-selector-mips64.cc

@@ -1716,7 +1716,7 @@ void InstructionSelector::EmitPrepareResults(
     Node* node) {
   Mips64OperandGenerator g(this);
 
-  int reverse_slot = 0;
+  int reverse_slot = 1;
   for (PushParameter output : *results) {
     if (!output.location.IsCallerFrameSlot()) continue;
     // Skip any alignment holes in nodes.
@@ -1726,6 +1726,8 @@ void InstructionSelector::EmitPrepareResults(
         MarkAsFloat32(output.node);
       } else if (output.location.GetType() == MachineType::Float64()) {
         MarkAsFloat64(output.node);
+      } else if (output.location.GetType() == MachineType::Simd128()) {
+        MarkAsSimd128(output.node);
       }
       Emit(kMips64Peek, g.DefineAsRegister(output.node),
            g.UseImmediate(reverse_slot));

src/wasm/baseline/mips64/liftoff-assembler-mips64.h

@@ -87,6 +87,9 @@ inline void Store(LiftoffAssembler* assm, Register base, int32_t offset,
     case ValueType::kF64:
       assm->Usdc1(src.fp(), dst, t8);
       break;
+    case ValueType::kS128:
+      assm->st_b(src.fp().toW(), dst);
+      break;
     default:
       UNREACHABLE();
   }