Commit 3fc2ee95 authored by LiuYu's avatar LiuYu Committed by Commit Bot

[mips][compiler] Inline 64bit immediates and RPO numbers in InstructionOperand

Port: 950b281f

Change-Id: I77f9389d1dfeaccccad533aa1d7bf41f913e6ae3
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2790502Reviewed-by: 's avatarZhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Commit-Queue: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Auto-Submit: Liu yu <liuyu@loongson.cn>
Cr-Commit-Position: refs/heads/master@{#73700}
parent b6df18ee
......@@ -1121,7 +1121,7 @@ void InstructionSelector::VisitBitcastFloat32ToInt32(Node* node) {
void InstructionSelector::VisitBitcastInt32ToFloat32(Node* node) {
MipsOperandGenerator g(this);
Emit(kMipsFloat64InsertLowWord32, g.DefineAsRegister(node),
ImmediateOperand(ImmediateOperand::INLINE, 0),
ImmediateOperand(ImmediateOperand::INLINE_INT32, 0),
g.UseRegister(node->InputAt(0)));
}
......
......@@ -1596,7 +1596,7 @@ void InstructionSelector::VisitBitcastFloat64ToInt64(Node* node) {
void InstructionSelector::VisitBitcastInt32ToFloat32(Node* node) {
Mips64OperandGenerator g(this);
Emit(kMips64Float64InsertLowWord32, g.DefineAsRegister(node),
ImmediateOperand(ImmediateOperand::INLINE, 0),
ImmediateOperand(ImmediateOperand::INLINE_INT32, 0),
g.UseRegister(node->InputAt(0)));
}
......
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