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Commit 3ef18f5a authored by dusan.m.milosavljevic's avatar dusan.m.milosavljevic Committed by Commit bot
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MIPS: [turbofan] Use RINT instruction for Float64|32Round ops. on r6. 

TEST=
BUG=

Review URL: https://codereview.chromium.org/1508423002

Cr-Commit-Position: refs/heads/master@{#32749}
parent be16b62f
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Showing with 68 additions and 34 deletions
src/compiler/mips/code-generator-mips.cc
View file @ 3ef18f5a
......@@ -409,8 +409,14 @@ FPUCondition FlagsConditionToConditionCmpFPU(bool& predicate,
} while (0)
#define ASSEMBLE_ROUND_DOUBLE_TO_DOUBLE(asm_instr) \
do { \
#define ASSEMBLE_ROUND_DOUBLE_TO_DOUBLE(mode) \
if (IsMipsArchVariant(kMips32r6)) { \
__ cfc1(kScratchReg, FCSR); \
__ li(at, Operand(mode_##mode)); \
__ ctc1(at, FCSR); \
__ rint_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); \
__ ctc1(kScratchReg, FCSR); \
} else { \
auto ool = new (zone()) OutOfLineRound(this, i.OutputDoubleRegister()); \
Label done; \
__ Mfhc1(kScratchReg, i.InputDoubleRegister(0)); \
......@@ -419,18 +425,24 @@ FPUCondition FlagsConditionToConditionCmpFPU(bool& predicate,
__ Branch(USE_DELAY_SLOT, &done, hs, at, \
Operand(HeapNumber::kExponentBias + HeapNumber::kMantissaBits)); \
__ mov_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); \
__ asm_instr(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); \
__ mode##_l_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); \
__ Move(at, kScratchReg2, i.OutputDoubleRegister()); \
__ or_(at, at, kScratchReg2); \
__ Branch(USE_DELAY_SLOT, ool->entry(), eq, at, Operand(zero_reg)); \
__ cvt_d_l(i.OutputDoubleRegister(), i.OutputDoubleRegister()); \
__ bind(ool->exit()); \
__ bind(&done); \
} while (0)
}
#define ASSEMBLE_ROUND_FLOAT_TO_FLOAT(asm_instr) \
do { \
#define ASSEMBLE_ROUND_FLOAT_TO_FLOAT(mode) \
if (IsMipsArchVariant(kMips32r6)) { \
__ cfc1(kScratchReg, FCSR); \
__ li(at, Operand(mode_##mode)); \
__ ctc1(at, FCSR); \
__ rint_s(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); \
__ ctc1(kScratchReg, FCSR); \
} else { \
int32_t kFloat32ExponentBias = 127; \
int32_t kFloat32MantissaBits = 23; \
int32_t kFloat32ExponentBits = 8; \
......@@ -441,13 +453,13 @@ FPUCondition FlagsConditionToConditionCmpFPU(bool& predicate,
__ Branch(USE_DELAY_SLOT, &done, hs, at, \
Operand(kFloat32ExponentBias + kFloat32MantissaBits)); \
__ mov_s(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); \
__ asm_instr(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); \
__ mode##_w_s(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); \
__ mfc1(at, i.OutputDoubleRegister()); \
__ Branch(USE_DELAY_SLOT, ool->entry(), eq, at, Operand(zero_reg)); \
__ cvt_s_w(i.OutputDoubleRegister(), i.OutputDoubleRegister()); \
__ bind(ool->exit()); \
__ bind(&done); \
} while (0)
}
void CodeGenerator::AssembleDeconstructActivationRecord(int stack_param_delta) {
int sp_slot_delta = TailCallFrameStackSlotDelta(stack_param_delta);
......@@ -830,35 +842,35 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
i.InputDoubleRegister(1));
break;
case kMipsFloat64RoundDown: {
ASSEMBLE_ROUND_DOUBLE_TO_DOUBLE(floor_l_d);
ASSEMBLE_ROUND_DOUBLE_TO_DOUBLE(floor);
break;
}
case kMipsFloat32RoundDown: {
ASSEMBLE_ROUND_FLOAT_TO_FLOAT(floor_w_s);
ASSEMBLE_ROUND_FLOAT_TO_FLOAT(floor);
break;
}
case kMipsFloat64RoundTruncate: {
ASSEMBLE_ROUND_DOUBLE_TO_DOUBLE(trunc_l_d);
ASSEMBLE_ROUND_DOUBLE_TO_DOUBLE(trunc);
break;
}
case kMipsFloat32RoundTruncate: {
ASSEMBLE_ROUND_FLOAT_TO_FLOAT(trunc_w_s);
ASSEMBLE_ROUND_FLOAT_TO_FLOAT(trunc);
break;
}
case kMipsFloat64RoundUp: {
ASSEMBLE_ROUND_DOUBLE_TO_DOUBLE(ceil_l_d);
ASSEMBLE_ROUND_DOUBLE_TO_DOUBLE(ceil);
break;
}
case kMipsFloat32RoundUp: {
ASSEMBLE_ROUND_FLOAT_TO_FLOAT(ceil_w_s);
ASSEMBLE_ROUND_FLOAT_TO_FLOAT(ceil);
break;
}
case kMipsFloat64RoundTiesEven: {
ASSEMBLE_ROUND_DOUBLE_TO_DOUBLE(round_l_d);
ASSEMBLE_ROUND_DOUBLE_TO_DOUBLE(round);
break;
}
case kMipsFloat32RoundTiesEven: {
ASSEMBLE_ROUND_FLOAT_TO_FLOAT(round_w_s);
ASSEMBLE_ROUND_FLOAT_TO_FLOAT(round);
break;
}
case kMipsFloat64Max: {
......
src/compiler/mips64/code-generator-mips64.cc
View file @ 3ef18f5a
......@@ -423,8 +423,14 @@ FPUCondition FlagsConditionToConditionCmpFPU(bool& predicate,
} while (0)
#define ASSEMBLE_ROUND_DOUBLE_TO_DOUBLE(asm_instr) \
do { \
#define ASSEMBLE_ROUND_DOUBLE_TO_DOUBLE(mode) \
if (kArchVariant == kMips64r6) { \
__ cfc1(kScratchReg, FCSR); \
__ li(at, Operand(mode_##mode)); \
__ ctc1(at, FCSR); \
__ rint_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); \
__ ctc1(kScratchReg, FCSR); \
} else { \
auto ool = new (zone()) OutOfLineRound(this, i.OutputDoubleRegister()); \
Label done; \
__ mfhc1(kScratchReg, i.InputDoubleRegister(0)); \
......@@ -433,16 +439,22 @@ FPUCondition FlagsConditionToConditionCmpFPU(bool& predicate,
__ Branch(USE_DELAY_SLOT, &done, hs, at, \
Operand(HeapNumber::kExponentBias + HeapNumber::kMantissaBits)); \
__ mov_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); \
__ asm_instr(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); \
__ mode##_l_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); \
__ dmfc1(at, i.OutputDoubleRegister()); \
__ Branch(USE_DELAY_SLOT, ool->entry(), eq, at, Operand(zero_reg)); \
__ cvt_d_l(i.OutputDoubleRegister(), i.OutputDoubleRegister()); \
__ bind(ool->exit()); \
__ bind(&done); \
} while (0)
}
#define ASSEMBLE_ROUND_FLOAT_TO_FLOAT(asm_instr) \
do { \
#define ASSEMBLE_ROUND_FLOAT_TO_FLOAT(mode) \
if (kArchVariant == kMips64r6) { \
__ cfc1(kScratchReg, FCSR); \
__ li(at, Operand(mode_##mode)); \
__ ctc1(at, FCSR); \
__ rint_s(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); \
__ ctc1(kScratchReg, FCSR); \
} else { \
int32_t kFloat32ExponentBias = 127; \
int32_t kFloat32MantissaBits = 23; \
int32_t kFloat32ExponentBits = 8; \
......@@ -453,13 +465,13 @@ FPUCondition FlagsConditionToConditionCmpFPU(bool& predicate,
__ Branch(USE_DELAY_SLOT, &done, hs, at, \
Operand(kFloat32ExponentBias + kFloat32MantissaBits)); \
__ mov_s(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); \
__ asm_instr(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); \
__ mode##_w_s(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); \
__ mfc1(at, i.OutputDoubleRegister()); \
__ Branch(USE_DELAY_SLOT, ool->entry(), eq, at, Operand(zero_reg)); \
__ cvt_s_w(i.OutputDoubleRegister(), i.OutputDoubleRegister()); \
__ bind(ool->exit()); \
__ bind(&done); \
} while (0)
}
void CodeGenerator::AssembleDeconstructActivationRecord(int stack_param_delta) {
int sp_slot_delta = TailCallFrameStackSlotDelta(stack_param_delta);
......@@ -929,35 +941,35 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
i.InputDoubleRegister(1));
break;
case kMips64Float64RoundDown: {
ASSEMBLE_ROUND_DOUBLE_TO_DOUBLE(floor_l_d);
ASSEMBLE_ROUND_DOUBLE_TO_DOUBLE(floor);
break;
}
case kMips64Float32RoundDown: {
ASSEMBLE_ROUND_FLOAT_TO_FLOAT(floor_w_s);
ASSEMBLE_ROUND_FLOAT_TO_FLOAT(floor);
break;
}
case kMips64Float64RoundTruncate: {
ASSEMBLE_ROUND_DOUBLE_TO_DOUBLE(trunc_l_d);
ASSEMBLE_ROUND_DOUBLE_TO_DOUBLE(trunc);
break;
}
case kMips64Float32RoundTruncate: {
ASSEMBLE_ROUND_FLOAT_TO_FLOAT(trunc_w_s);
ASSEMBLE_ROUND_FLOAT_TO_FLOAT(trunc);
break;
}
case kMips64Float64RoundUp: {
ASSEMBLE_ROUND_DOUBLE_TO_DOUBLE(ceil_l_d);
ASSEMBLE_ROUND_DOUBLE_TO_DOUBLE(ceil);
break;
}
case kMips64Float32RoundUp: {
ASSEMBLE_ROUND_FLOAT_TO_FLOAT(ceil_w_s);
ASSEMBLE_ROUND_FLOAT_TO_FLOAT(ceil);
break;
}
case kMips64Float64RoundTiesEven: {
ASSEMBLE_ROUND_DOUBLE_TO_DOUBLE(round_l_d);
ASSEMBLE_ROUND_DOUBLE_TO_DOUBLE(round);
break;
}
case kMips64Float32RoundTiesEven: {
ASSEMBLE_ROUND_FLOAT_TO_FLOAT(round_w_s);
ASSEMBLE_ROUND_FLOAT_TO_FLOAT(round);
break;
}
case kMips64Float64Max: {
......
src/mips/constants-mips.h
View file @ 3ef18f5a
......@@ -777,7 +777,12 @@ enum FPURoundingMode {
kRoundToNearest = RN,
kRoundToZero = RZ,
kRoundToPlusInf = RP,
kRoundToMinusInf = RM
kRoundToMinusInf = RM,
mode_round = RN,
mode_ceil = RP,
mode_floor = RM,
mode_trunc = RZ
};
const uint32_t kFPURoundingModeMask = 3 << 0;
......
src/mips64/constants-mips64.h
View file @ 3ef18f5a
......@@ -813,7 +813,12 @@ enum FPURoundingMode {
kRoundToNearest = RN,
kRoundToZero = RZ,
kRoundToPlusInf = RP,
kRoundToMinusInf = RM
kRoundToMinusInf = RM,
mode_round = RN,
mode_ceil = RP,
mode_floor = RM,
mode_trunc = RZ
};
const uint32_t kFPURoundingModeMask = 3 << 0;
......
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