Commit 3ed54568 authored by Junliang Yan's avatar Junliang Yan Committed by V8 LUCI CQ

ppc: [liftoff] implement Spill function

Change-Id: Ib4c3335389d1df0c48a529c3bb096de2382a86a1
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2994727
Commit-Queue: Junliang Yan <junyan@redhat.com>
Reviewed-by: 's avatarMilad Fa <mfarazma@redhat.com>
Cr-Commit-Position: refs/heads/master@{#75445}
parent e0f4f0b8
......@@ -39,6 +39,7 @@ namespace liftoff {
// | | v
// -----+--------------------+ <-- stack ptr (sp)
//
//
constexpr int32_t kInstanceOffset = 2 * kSystemPointerSize;
......@@ -603,11 +604,55 @@ void LiftoffAssembler::Move(DoubleRegister dst, DoubleRegister src,
}
void LiftoffAssembler::Spill(int offset, LiftoffRegister reg, ValueKind kind) {
bailout(kUnsupportedArchitecture, "Spill register");
DCHECK_LT(0, offset);
RecordUsedSpillOffset(offset);
switch (kind) {
case kI32:
StoreU32(reg.gp(), liftoff::GetStackSlot(offset + stack_bias), r0);
break;
case kI64:
case kOptRef:
case kRef:
case kRtt:
case kRttWithDepth:
StoreU64(reg.gp(), liftoff::GetStackSlot(offset), r0);
break;
case kF32:
StoreF32(reg.fp(), liftoff::GetStackSlot(offset + stack_bias), r0);
break;
case kF64:
StoreF64(reg.fp(), liftoff::GetStackSlot(offset), r0);
break;
case kS128: {
bailout(kSimd, "simd op");
break;
}
default:
UNREACHABLE();
}
}
void LiftoffAssembler::Spill(int offset, WasmValue value) {
bailout(kUnsupportedArchitecture, "Spill value");
RecordUsedSpillOffset(offset);
UseScratchRegisterScope temps(this);
Register src = no_reg;
src = ip;
switch (value.type().kind()) {
case kI32: {
mov(src, Operand(value.to_i32()));
StoreU32(src, liftoff::GetStackSlot(offset + stack_bias), r0);
break;
}
case kI64: {
mov(src, Operand(value.to_i64()));
StoreU64(src, liftoff::GetStackSlot(offset), r0);
break;
}
default:
// We do not track f32 and f64 constants, hence they are unreachable.
UNREACHABLE();
}
}
void LiftoffAssembler::Fill(LiftoffRegister reg, int offset, ValueKind kind) {
......
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