Commit 3baca985 authored by George Wort's avatar George Wort Committed by Commit Bot

[liftoff][arm] Initial 32-bit port.

Bug: v8:6600
Change-Id: I9ca4c52cec6fe6d6a88483072084dbd5a174a603
Reviewed-on: https://chromium-review.googlesource.com/c/1309755
Commit-Queue: Clemens Hammacher <clemensh@chromium.org>
Reviewed-by: 's avatarClemens Hammacher <clemensh@chromium.org>
Reviewed-by: 's avatarBen Titzer <titzer@chromium.org>
Cr-Commit-Position: refs/heads/master@{#57405}
parent f321afee
......@@ -5394,6 +5394,13 @@ PatchingAssembler::~PatchingAssembler() {
void PatchingAssembler::Emit(Address addr) { emit(static_cast<Instr>(addr)); }
void PatchingAssembler::PadWithNops() {
DCHECK_LE(pc_, buffer_ + buffer_size_ - kGap);
while (pc_ < buffer_ + buffer_size_ - kGap) {
nop();
}
}
UseScratchRegisterScope::UseScratchRegisterScope(Assembler* assembler)
: assembler_(assembler),
old_available_(*assembler->GetScratchRegisterList()),
......
......@@ -625,6 +625,11 @@ class V8_EXPORT_PRIVATE Assembler : public AssemblerBase {
Assembler(const AssemblerOptions& options, void* buffer, int buffer_size);
virtual ~Assembler();
virtual void AbortedCodeGeneration() {
pending_32_bit_constants_.clear();
pending_64_bit_constants_.clear();
}
// GetCode emits any pending (non-emitted) code and fills the descriptor
// desc. GetCode() is idempotent; it returns the same result if no other
// Assembler functions are invoked in between GetCode() calls.
......@@ -1700,6 +1705,7 @@ class PatchingAssembler : public Assembler {
~PatchingAssembler();
void Emit(Address addr);
void PadWithNops();
};
// This scope utility allows scratch registers to be managed safely. The
......
......@@ -47,6 +47,17 @@ constexpr RegList kLiftoffAssemblerFpCacheRegs =
DoubleRegister::ListOf<f0, f2, f4, f6, f8, f10, f12, f14, f16, f18, f20,
f22, f24, f26>();
#elif V8_TARGET_ARCH_ARM
// r7: cp, r10: root, r11: fp, r12: ip, r13: sp, r14: lr, r15: pc.
constexpr RegList kLiftoffAssemblerGpCacheRegs =
Register::ListOf<r0, r1, r2, r3, r4, r5, r6, r8, r9>();
// d13: zero, d14-d15: scratch
constexpr RegList kLiftoffAssemblerFpCacheRegs =
LowDwVfpRegister::ListOf<d0, d1, d2, d3, d4, d5, d6, d7, d8, d9, d10, d11,
d12>();
#elif V8_TARGET_ARCH_ARM64
// x16: ip0, x17: ip1, x26: root, x27: cp, x29: fp, x30: lr, x31: xzr.
......
......@@ -104,8 +104,15 @@ compiler::CallDescriptor* GetLoweredCallDescriptor(
: call_desc;
}
constexpr ValueType kTypesArr_ilfd[] = {kWasmI32, kWasmI64, kWasmF32, kWasmF64};
constexpr Vector<const ValueType> kTypes_ilfd = ArrayVector(kTypesArr_ilfd);
// TODO(arm): Add support for F32 registers. Fix arm32 FP registers alias.
#if V8_TARGET_ARCH_ARM
constexpr ValueType kSupportedTypesArr[] = {kWasmI32, kWasmI64, kWasmF64};
#else
constexpr ValueType kSupportedTypesArr[] = {kWasmI32, kWasmI64, kWasmF32,
kWasmF64};
#endif
constexpr Vector<const ValueType> kSupportedTypes =
ArrayVector(kSupportedTypesArr);
class LiftoffCompiler {
public:
......@@ -293,7 +300,8 @@ class LiftoffCompiler {
void StartFunctionBody(FullDecoder* decoder, Control* block) {
for (uint32_t i = 0; i < __ num_locals(); ++i) {
if (!CheckSupportedType(decoder, kTypes_ilfd, __ local_type(i), "param"))
if (!CheckSupportedType(decoder, kSupportedTypes, __ local_type(i),
"param"))
return;
}
......@@ -1161,7 +1169,7 @@ class LiftoffCompiler {
void GetGlobal(FullDecoder* decoder, Value* result,
const GlobalIndexImmediate<validate>& imm) {
const auto* global = &env_->module->globals[imm.index];
if (!CheckSupportedType(decoder, kTypes_ilfd, global->type, "global"))
if (!CheckSupportedType(decoder, kSupportedTypes, global->type, "global"))
return;
LiftoffRegList pinned;
uint32_t offset = 0;
......@@ -1176,7 +1184,7 @@ class LiftoffCompiler {
void SetGlobal(FullDecoder* decoder, const Value& value,
const GlobalIndexImmediate<validate>& imm) {
auto* global = &env_->module->globals[imm.index];
if (!CheckSupportedType(decoder, kTypes_ilfd, global->type, "global"))
if (!CheckSupportedType(decoder, kSupportedTypes, global->type, "global"))
return;
LiftoffRegList pinned;
uint32_t offset = 0;
......@@ -1483,7 +1491,8 @@ class LiftoffCompiler {
const MemoryAccessImmediate<validate>& imm,
const Value& index_val, Value* result) {
ValueType value_type = type.value_type();
if (!CheckSupportedType(decoder, kTypes_ilfd, value_type, "load")) return;
if (!CheckSupportedType(decoder, kSupportedTypes, value_type, "load"))
return;
LiftoffRegList pinned;
Register index = pinned.set(__ PopToRegister()).gp();
if (BoundsCheckMem(decoder, type.size(), imm.offset, index, pinned)) {
......@@ -1515,7 +1524,8 @@ class LiftoffCompiler {
const MemoryAccessImmediate<validate>& imm,
const Value& index_val, const Value& value_val) {
ValueType value_type = type.value_type();
if (!CheckSupportedType(decoder, kTypes_ilfd, value_type, "store")) return;
if (!CheckSupportedType(decoder, kSupportedTypes, value_type, "store"))
return;
LiftoffRegList pinned;
LiftoffRegister value = pinned.set(__ PopToRegister());
Register index = pinned.set(__ PopToRegister(pinned)).gp();
......@@ -1588,7 +1598,7 @@ class LiftoffCompiler {
if (imm.sig->return_count() > 1)
return unsupported(decoder, "multi-return");
if (imm.sig->return_count() == 1 &&
!CheckSupportedType(decoder, kTypes_ilfd, imm.sig->GetReturn(0),
!CheckSupportedType(decoder, kSupportedTypes, imm.sig->GetReturn(0),
"return"))
return;
......@@ -1653,7 +1663,7 @@ class LiftoffCompiler {
return unsupported(decoder, "multi-return");
}
if (imm.sig->return_count() == 1 &&
!CheckSupportedType(decoder, kTypes_ilfd, imm.sig->GetReturn(0),
!CheckSupportedType(decoder, kSupportedTypes, imm.sig->GetReturn(0),
"return")) {
return;
}
......
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