PPC/s390: [wasm-simd][x64][liftoff] Implement i64x2.abs

Port 31aab838

Original Commit Message:

    Extract code sequence into macro-assembler for sharing between Liftoff
    and TurboFan. Relax the register aliasing requirements (remove the
    DCHECKS), this will not affect codegen for TurboFan since the
    instruction selector already sets the correct restrictions, but makes it
    more flexible for use in Liftoff.

R=zhin@chromium.org, joransiu@ca.ibm.com, junyan@redhat.com, midawson@redhat.com
BUG=
LOG=N

Change-Id: I729095aae0412fce70ec97a1d7c5f27d32b1a932
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2718143Reviewed-by: Junliang Yan <junyan@redhat.com>
Commit-Queue: Milad Fa <mfarazma@redhat.com>
Cr-Commit-Position: refs/heads/master@{#73011}

src/wasm/baseline/ppc/liftoff-assembler-ppc.h

@@ -1699,6 +1699,11 @@ void LiftoffAssembler::emit_i32x4_abs(LiftoffRegister dst,
   bailout(kUnsupportedArchitecture, "emit_i32x4_abs");
 }
 
+void LiftoffAssembler::emit_i64x2_abs(LiftoffRegister dst,
+                                      LiftoffRegister src) {
+  bailout(kSimd, "i64x2.abs");
+}
+
 void LiftoffAssembler::emit_i8x16_sub(LiftoffRegister dst, LiftoffRegister lhs,
                                       LiftoffRegister rhs) {
   bailout(kUnsupportedArchitecture, "emit_i8x16sub");

src/wasm/baseline/s390/liftoff-assembler-s390.h

@@ -2432,6 +2432,11 @@ void LiftoffAssembler::emit_i32x4_abs(LiftoffRegister dst,
   bailout(kUnsupportedArchitecture, "emit_i32x4_abs");
 }
 
+void LiftoffAssembler::emit_i64x2_abs(LiftoffRegister dst,
+                                      LiftoffRegister src) {
+  bailout(kSimd, "i64x2.abs");
+}
+
 void LiftoffAssembler::StackCheck(Label* ool_code, Register limit_address) {
   bailout(kUnsupportedArchitecture, "StackCheck");
 }