[mips64] Push the full MSA register before lazy compile

Port: 3b302d5c

Port: 45b99aaa

Besides, removed redundant DCHECK.

Change-Id: Ifac825ae7670b075750603b2c61a3d60a85cc373
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2662581Reviewed-by: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Commit-Queue: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Auto-Submit: Liu yu <liuyu@loongson.cn>
Cr-Commit-Position: refs/heads/master@{#72471}

src/builtins/mips64/builtins-mips64.cc

@@ -2362,7 +2362,12 @@ void Builtins::Generate_WasmCompileLazy(MacroAssembler* masm) {
     STATIC_ASSERT(num_to_push ==
                   WasmCompileLazyFrameConstants::kNumberOfSavedAllParamRegs);
     __ MultiPush(gp_regs);
-    __ MultiPushFPU(fp_regs);
+    if (CpuFeatures::IsSupported(MIPS_SIMD)) {
+      __ MultiPushMSA(fp_regs);
+    } else {
+      __ MultiPushFPU(fp_regs);
+      __ Dsubu(sp, sp, base::bits::CountPopulation(fp_regs) * kDoubleSize);
+    }
 
     // Pass instance and function index as an explicit arguments to the runtime
     // function.
@@ -2373,7 +2378,12 @@ void Builtins::Generate_WasmCompileLazy(MacroAssembler* masm) {
     __ CallRuntime(Runtime::kWasmCompileLazy, 2);
 
     // Restore registers.
-    __ MultiPopFPU(fp_regs);
+    if (CpuFeatures::IsSupported(MIPS_SIMD)) {
+      __ MultiPopMSA(fp_regs);
+    } else {
+      __ Daddu(sp, sp, base::bits::CountPopulation(fp_regs) * kDoubleSize);
+      __ MultiPopFPU(fp_regs);
+    }
     __ MultiPop(gp_regs);
   }
   // Finally, jump to the entrypoint.

src/codegen/mips/macro-assembler-mips.cc

@@ -4562,7 +4562,6 @@ void MacroAssembler::GetObjectType(Register object, Register map,
 void MacroAssembler::GetInstanceTypeRange(Register map, Register type_reg,
                                           InstanceType lower_limit,
                                           Register range) {
-  DCHECK_LT(lower_limit, higher_limit);
   lhu(type_reg, FieldMemOperand(map, Map::kInstanceTypeOffset));
   Subu(range, type_reg, Operand(lower_limit));
 }

src/codegen/mips64/macro-assembler-mips64.cc

@@ -2011,6 +2011,31 @@ void TurboAssembler::MultiPopFPU(RegList regs) {
   daddiu(sp, sp, stack_offset);
 }
 
+void TurboAssembler::MultiPushMSA(RegList regs) {
+  int16_t num_to_push = base::bits::CountPopulation(regs);
+  int16_t stack_offset = num_to_push * kSimd128Size;
+
+  Dsubu(sp, sp, Operand(stack_offset));
+  for (int16_t i = kNumRegisters - 1; i >= 0; i--) {
+    if ((regs & (1 << i)) != 0) {
+      stack_offset -= kSimd128Size;
+      st_d(MSARegister::from_code(i), MemOperand(sp, stack_offset));
+    }
+  }
+}
+
+void TurboAssembler::MultiPopMSA(RegList regs) {
+  int16_t stack_offset = 0;
+
+  for (int16_t i = 0; i < kNumRegisters; i++) {
+    if ((regs & (1 << i)) != 0) {
+      ld_d(MSARegister::from_code(i), MemOperand(sp, stack_offset));
+      stack_offset += kSimd128Size;
+    }
+  }
+  daddiu(sp, sp, stack_offset);
+}
+
 void TurboAssembler::Ext(Register rt, Register rs, uint16_t pos,
                          uint16_t size) {
   DCHECK_LT(pos, 32);
@@ -5007,7 +5032,6 @@ void MacroAssembler::GetObjectType(Register object, Register map,
 void MacroAssembler::GetInstanceTypeRange(Register map, Register type_reg,
                                           InstanceType lower_limit,
                                           Register range) {
-  DCHECK_LT(lower_limit, higher_limit);
   Lhu(type_reg, FieldMemOperand(map, Map::kInstanceTypeOffset));
   Dsubu(range, type_reg, Operand(lower_limit));
 }

src/codegen/mips64/macro-assembler-mips64.h

@@ -355,6 +355,7 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
   // saved in higher memory addresses.
   void MultiPush(RegList regs);
   void MultiPushFPU(RegList regs);
+  void MultiPushMSA(RegList regs);
 
   // Calculate how much stack space (in bytes) are required to store caller
   // registers excluding those specified in the arguments.
@@ -402,6 +403,7 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
   // registers specified in regs. Pop order is the opposite as in MultiPush.
   void MultiPop(RegList regs);
   void MultiPopFPU(RegList regs);
+  void MultiPopMSA(RegList regs);
 
 #define DEFINE_INSTRUCTION(instr)                          \
   void instr(Register rd, Register rs, const Operand& rt); \

src/compiler/backend/mips64/code-generator-mips64.cc

@@ -4422,7 +4422,6 @@ void CodeGenerator::AssembleReturn(InstructionOperand* additional_pop_count) {
     __ dsll(t0, t0, kSystemPointerSizeLog2);
     __ Daddu(sp, sp, t0);
   } else if (additional_pop_count->IsImmediate()) {
-    DCHECK_EQ(Constant::kInt32, g.ToConstant(additional_pop_count).type());
     int additional_count = g.ToConstant(additional_pop_count).ToInt32();
     __ Drop(parameter_count + additional_count);
   } else {

src/execution/mips64/frame-constants-mips64.h

@@ -29,10 +29,11 @@ class WasmCompileLazyFrameConstants : public TypedFrameConstants {
   // See Generate_WasmCompileLazy in builtins-mips64.cc.
   static constexpr int kWasmInstanceOffset =
       TYPED_FRAME_PUSHED_VALUE_OFFSET(kNumberOfSavedAllParamRegs);
+
   static constexpr int kFixedFrameSizeFromFp =
       TypedFrameConstants::kFixedFrameSizeFromFp +
       kNumberOfSavedGpParamRegs * kPointerSize +
-      kNumberOfSavedFpParamRegs * kDoubleSize;
+      kNumberOfSavedFpParamRegs * kSimd128Size;
 };
 
 // Frame constructed by the {WasmDebugBreak} builtin.