Commit 37e9437e authored by jyan's avatar jyan Committed by Commit bot

s390: optimize for compares

1. use ltr/ltgr when possible
2. combine compares with possible load

R=joransiu@ca.ibm.com, bjaideep@ca.ibm.com

Review-Url: https://codereview.chromium.org/2696343002
Cr-Commit-Position: refs/heads/master@{#43265}
parent 50e26939
This diff is collapsed.
...@@ -135,6 +135,10 @@ namespace compiler { ...@@ -135,6 +135,10 @@ namespace compiler {
V(S390_LoadWordU16) \ V(S390_LoadWordU16) \
V(S390_LoadWordS32) \ V(S390_LoadWordS32) \
V(S390_LoadWordU32) \ V(S390_LoadWordU32) \
V(S390_LoadAndTestWord32) \
V(S390_LoadAndTestWord64) \
V(S390_LoadAndTestFloat32) \
V(S390_LoadAndTestFloat64) \
V(S390_LoadReverse16RR) \ V(S390_LoadReverse16RR) \
V(S390_LoadReverse32RR) \ V(S390_LoadReverse32RR) \
V(S390_LoadReverse64RR) \ V(S390_LoadReverse64RR) \
......
...@@ -130,6 +130,10 @@ int InstructionScheduler::GetTargetInstructionFlags( ...@@ -130,6 +130,10 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kS390_LoadReverse16RR: case kS390_LoadReverse16RR:
case kS390_LoadReverse32RR: case kS390_LoadReverse32RR:
case kS390_LoadReverse64RR: case kS390_LoadReverse64RR:
case kS390_LoadAndTestWord32:
case kS390_LoadAndTestWord64:
case kS390_LoadAndTestFloat32:
case kS390_LoadAndTestFloat64:
return kNoOpcodeFlags; return kNoOpcodeFlags;
case kS390_LoadWordS8: case kS390_LoadWordS8:
......
...@@ -1250,7 +1250,6 @@ void Assembler::rrfe_form(Opcode op, Condition m3, Condition m4, Register r1, ...@@ -1250,7 +1250,6 @@ void Assembler::rrfe_form(Opcode op, Condition m3, Condition m4, Register r1,
// end of S390 Instruction generation // end of S390 Instruction generation
// start of S390 instruction // start of S390 instruction
RXE_FORM_EMIT(ceb, CEB)
SS1_FORM_EMIT(ed, ED) SS1_FORM_EMIT(ed, ED)
SS1_FORM_EMIT(mvn, MVN) SS1_FORM_EMIT(mvn, MVN)
SS1_FORM_EMIT(nc, NC) SS1_FORM_EMIT(nc, NC)
...@@ -1863,6 +1862,16 @@ void Assembler::sdb(DoubleRegister r1, const MemOperand& opnd) { ...@@ -1863,6 +1862,16 @@ void Assembler::sdb(DoubleRegister r1, const MemOperand& opnd) {
opnd.offset()); opnd.offset());
} }
void Assembler::ceb(DoubleRegister r1, const MemOperand& opnd) {
rxe_form(CEB, Register::from_code(r1.code()), opnd.rx(), opnd.rb(),
opnd.offset());
}
void Assembler::cdb(DoubleRegister r1, const MemOperand& opnd) {
rxe_form(CDB, Register::from_code(r1.code()), opnd.rx(), opnd.rb(),
opnd.offset());
}
// Square Root (LB) // Square Root (LB)
void Assembler::sqdb(DoubleRegister r1, const MemOperand& opnd) { void Assembler::sqdb(DoubleRegister r1, const MemOperand& opnd) {
rxe_form(SQDB, Register::from_code(r1.code()), opnd.rx(), opnd.rb(), rxe_form(SQDB, Register::from_code(r1.code()), opnd.rx(), opnd.rb(),
......
...@@ -1006,8 +1006,6 @@ class Assembler : public AssemblerBase { ...@@ -1006,8 +1006,6 @@ class Assembler : public AssemblerBase {
} }
// S390 instruction sets // S390 instruction sets
RXE_FORM(cdb);
RXE_FORM(ceb);
RXE_FORM(ddb); RXE_FORM(ddb);
SS1_FORM(ed); SS1_FORM(ed);
RRF2_FORM(fidbr); RRF2_FORM(fidbr);
...@@ -1200,6 +1198,7 @@ class Assembler : public AssemblerBase { ...@@ -1200,6 +1198,7 @@ class Assembler : public AssemblerBase {
// Floating Point Compare Instructions // Floating Point Compare Instructions
void cdb(DoubleRegister r1, const MemOperand& opnd); void cdb(DoubleRegister r1, const MemOperand& opnd);
void ceb(DoubleRegister r1, const MemOperand& opnd);
// Floating Point Arithmetic Instructions // Floating Point Arithmetic Instructions
void adb(DoubleRegister r1, const MemOperand& opnd); void adb(DoubleRegister r1, const MemOperand& opnd);
......
...@@ -1434,7 +1434,13 @@ bool Decoder::DecodeSixByte(Instruction* instr) { ...@@ -1434,7 +1434,13 @@ bool Decoder::DecodeSixByte(Instruction* instr) {
Format(instr, "stdy\t'f1,'d2('r2d,'r3)"); Format(instr, "stdy\t'f1,'d2('r2d,'r3)");
break; break;
case ADB: case ADB:
Format(instr, "adb\t'r1,'d1('r2d, 'r3)"); Format(instr, "adb\t'f1,'d1('r2d, 'r3)");
break;
case CDB:
Format(instr, "cdb\t'f1,'d1('r2d, 'r3)");
break;
case CEB:
Format(instr, "ceb\t'f1,'d1('r2d, 'r3)");
break; break;
case SDB: case SDB:
Format(instr, "sdb\t'r1,'d1('r2d, 'r3)"); Format(instr, "sdb\t'r1,'d1('r2d, 'r3)");
......
...@@ -3307,7 +3307,10 @@ void MacroAssembler::MulHighU32(Register dst, Register src1, ...@@ -3307,7 +3307,10 @@ void MacroAssembler::MulHighU32(Register dst, Register src1,
void MacroAssembler::Mul32WithOverflowIfCCUnequal(Register dst, Register src1, void MacroAssembler::Mul32WithOverflowIfCCUnequal(Register dst, Register src1,
const MemOperand& src2) { const MemOperand& src2) {
Register result = dst;
if (src2.rx().is(dst) || src2.rb().is(dst)) dst = r0;
Generate_Mul32WithOverflowIfCCUnequal(msgf); Generate_Mul32WithOverflowIfCCUnequal(msgf);
if (!result.is(dst)) llgfr(result, dst);
} }
void MacroAssembler::Mul32WithOverflowIfCCUnequal(Register dst, Register src1, void MacroAssembler::Mul32WithOverflowIfCCUnequal(Register dst, Register src1,
......
...@@ -1850,6 +1850,11 @@ double Simulator::ReadDouble(intptr_t addr) { ...@@ -1850,6 +1850,11 @@ double Simulator::ReadDouble(intptr_t addr) {
return *ptr; return *ptr;
} }
float Simulator::ReadFloat(intptr_t addr) {
float* ptr = reinterpret_cast<float*>(addr);
return *ptr;
}
// Returns the limit of the stack area to enable checking for stack overflows. // Returns the limit of the stack area to enable checking for stack overflows.
uintptr_t Simulator::StackLimit(uintptr_t c_limit) const { uintptr_t Simulator::StackLimit(uintptr_t c_limit) const {
// The simulator uses a separate JS stack. If we have exhausted the C stack, // The simulator uses a separate JS stack. If we have exhausted the C stack,
...@@ -12542,9 +12547,16 @@ EVALUATE(KEB) { ...@@ -12542,9 +12547,16 @@ EVALUATE(KEB) {
} }
EVALUATE(CEB) { EVALUATE(CEB) {
UNIMPLEMENTED(); DCHECK_OPCODE(CEB);
USE(instr);
return 0; DECODE_RXE_INSTRUCTION(r1, b2, x2, d2);
int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
int64_t x2_val = (x2 == 0) ? 0 : get_register(x2);
intptr_t d2_val = d2;
float r1_val = get_float32_from_d_register(r1);
float fval = ReadFloat(b2_val + x2_val + d2_val);
SetS390ConditionCode<float>(r1_val, fval);
return length;
} }
EVALUATE(AEB) { EVALUATE(AEB) {
......
...@@ -304,6 +304,7 @@ class Simulator { ...@@ -304,6 +304,7 @@ class Simulator {
inline int64_t ReadDW(intptr_t addr); inline int64_t ReadDW(intptr_t addr);
inline double ReadDouble(intptr_t addr); inline double ReadDouble(intptr_t addr);
inline float ReadFloat(intptr_t addr);
inline void WriteDW(intptr_t addr, int64_t value); inline void WriteDW(intptr_t addr, int64_t value);
// S390 // S390
......
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