[x64] Fix suboptimal instruction selection for mov reg, Smi

The movq instruction with 8 immediate bytes is used for moving negative
Smi to register previously. This CL reduce the immediate bytes by using
mov imm32 with sign extension.

To move a Smi of -1 to register, the disassembly before the commit is as:
48b8feffffffffffffff   REX.W movq rax, 0xfffffffffffffffe

The disassembly after the commit is as:
48c7c0feffffff         REX.W movq rax, 0xfffffffe

Change-Id: Ib54a4fbe66f59f86b9f13a72431ceb38470f1017
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3500205Reviewed-by: Jakob Gruber <jgruber@chromium.org>
Commit-Queue: Haoyu Zhang <haoyu.zhang@intel.com>
Cr-Commit-Position: refs/heads/main@{#79337}

src/codegen/x64/macro-assembler-x64.cc

@@ -1468,11 +1468,11 @@ void TurboAssembler::Move(Register dst, Smi source) {
   int value = source.value();
   if (value == 0) {
     xorl(dst, dst);
-  } else if (SmiValuesAre32Bits() || value < 0) {
+  } else if (SmiValuesAre32Bits()) {
     Move(dst, source.ptr(), RelocInfo::NO_INFO);
   } else {
-    uint32_t uvalue = static_cast<uint32_t>(source.ptr());
-    Move(dst, uvalue);
+    intptr_t svalue = static_cast<intptr_t>(source.ptr());
+    Move(dst, svalue);
   }
 }