Commit 3537bc6e authored by sreten.kovacevic's avatar sreten.kovacevic Committed by Commit Bot

[Liftoff][mips] Add fp32 and fp64 ops on MIPS

Implemented fp binops for both 32-bit and 64-bit operands.

Bug: v8:6600
Change-Id: Ide223ad0df58f625adef2b2232d0e93c7dcb3524
Reviewed-on: https://chromium-review.googlesource.com/926802
Commit-Queue: Sreten Kovacevic <sreten.kovacevic@mips.com>
Reviewed-by: 's avatarClemens Hammacher <clemensh@chromium.org>
Cr-Commit-Position: refs/heads/master@{#51418}
parent 9e855013
......@@ -58,7 +58,7 @@ void LiftoffAssembler::LoadConstant(LiftoffRegister reg, WasmValue value,
TurboAssembler::Move(reg.fp(), value.to_f32_boxed().get_scalar());
break;
case kWasmF64:
BAILOUT("LoadConstant kWasmF64");
TurboAssembler::Move(reg.fp(), value.to_f64_boxed().get_scalar());
break;
default:
UNREACHABLE();
......@@ -113,7 +113,7 @@ void LiftoffAssembler::MoveToReturnRegister(LiftoffRegister reg,
LiftoffRegister dst =
reg.is_pair()
? LiftoffRegister::ForPair(LiftoffRegister(v0), LiftoffRegister(v1))
: reg.is_gp() ? LiftoffRegister(v0) : LiftoffRegister(f0);
: reg.is_gp() ? LiftoffRegister(v0) : LiftoffRegister(f2);
if (reg != dst) Move(dst, reg, type);
}
......@@ -192,28 +192,26 @@ bool LiftoffAssembler::emit_i32_popcnt(Register dst, Register src) {
instruction(dst, lhs, rhs); \
}
// clang-format off
I32_SHIFTOP(shl, sllv)
I32_SHIFTOP(sar, srav)
I32_SHIFTOP(shr, srlv)
// clang-format on
#undef I32_SHIFTOP
#define UNIMPLEMENTED_FP_BINOP(name) \
#define FP_BINOP(name, instruction) \
void LiftoffAssembler::emit_##name(DoubleRegister dst, DoubleRegister lhs, \
DoubleRegister rhs) { \
BAILOUT("fp binop"); \
instruction(dst, lhs, rhs); \
}
UNIMPLEMENTED_FP_BINOP(f32_add)
UNIMPLEMENTED_FP_BINOP(f32_sub)
UNIMPLEMENTED_FP_BINOP(f32_mul)
UNIMPLEMENTED_FP_BINOP(f64_add)
UNIMPLEMENTED_FP_BINOP(f64_sub)
UNIMPLEMENTED_FP_BINOP(f64_mul)
FP_BINOP(f32_add, add_s)
FP_BINOP(f32_sub, sub_s)
FP_BINOP(f32_mul, mul_s)
FP_BINOP(f64_add, add_d)
FP_BINOP(f64_sub, sub_d)
FP_BINOP(f64_mul, mul_d)
#undef UNIMPLEMENTED_FP_BINOP
#undef FP_BINOP
void LiftoffAssembler::emit_jump(Label* label) {
TurboAssembler::Branch(label);
......
......@@ -53,7 +53,7 @@ void LiftoffAssembler::LoadConstant(LiftoffRegister reg, WasmValue value,
TurboAssembler::Move(reg.fp(), value.to_f32_boxed().get_scalar());
break;
case kWasmF64:
BAILOUT("LoadConstant kWasmF64");
TurboAssembler::Move(reg.fp(), value.to_f64_boxed().get_scalar());
break;
default:
UNREACHABLE();
......@@ -107,7 +107,7 @@ void LiftoffAssembler::MoveStackValue(uint32_t dst_index, uint32_t src_index,
void LiftoffAssembler::MoveToReturnRegister(LiftoffRegister reg,
ValueType type) {
LiftoffRegister dst = reg.is_gp() ? LiftoffRegister(v0) : LiftoffRegister(f0);
LiftoffRegister dst = reg.is_gp() ? LiftoffRegister(v0) : LiftoffRegister(f2);
if (reg != dst) Move(dst, reg, type);
}
......@@ -187,28 +187,26 @@ bool LiftoffAssembler::emit_i32_popcnt(Register dst, Register src) {
instruction(dst, lhs, rhs); \
}
// clang-format off
I32_SHIFTOP(shl, sllv)
I32_SHIFTOP(sar, srav)
I32_SHIFTOP(shr, srlv)
// clang-format on
#undef I32_SHIFTOP
#define UNIMPLEMENTED_FP_BINOP(name) \
#define FP_BINOP(name, instruction) \
void LiftoffAssembler::emit_##name(DoubleRegister dst, DoubleRegister lhs, \
DoubleRegister rhs) { \
BAILOUT("fp binop"); \
instruction(dst, lhs, rhs); \
}
UNIMPLEMENTED_FP_BINOP(f32_add)
UNIMPLEMENTED_FP_BINOP(f32_sub)
UNIMPLEMENTED_FP_BINOP(f32_mul)
UNIMPLEMENTED_FP_BINOP(f64_add)
UNIMPLEMENTED_FP_BINOP(f64_sub)
UNIMPLEMENTED_FP_BINOP(f64_mul)
FP_BINOP(f32_add, add_s)
FP_BINOP(f32_sub, sub_s)
FP_BINOP(f32_mul, mul_s)
FP_BINOP(f64_add, add_d)
FP_BINOP(f64_sub, sub_d)
FP_BINOP(f64_mul, mul_d)
#undef UNIMPLEMENTED_FP_BINOP
#undef FP_BINOP
void LiftoffAssembler::emit_jump(Label* label) {
TurboAssembler::Branch(label);
......
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