MIPS: [turbofan] Optimize division/modulus by constant.

Port r24595 (d0f464e)

TEST=cctest,mjsunit,unittests
BUG=
R=paul.lind@imgtec.com

Review URL: https://codereview.chromium.org/651223003

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@24611 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

src/compiler/mips/code-generator-mips.cc

@@ -185,6 +185,9 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
     case kMipsMul:
       __ Mul(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
       break;
+    case kMipsMulHigh:
+      __ Mulh(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
+      break;
     case kMipsDiv:
       __ Div(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
       break;

src/compiler/mips/instruction-codes-mips.h

@@ -17,6 +17,7 @@ namespace compiler {
   V(MipsSub)                       \
   V(MipsSubOvf)                    \
   V(MipsMul)                       \
+  V(MipsMulHigh)                   \
   V(MipsDiv)                       \
   V(MipsDivU)                      \
   V(MipsMod)                       \

src/compiler/mips/instruction-selector-mips.cc

@@ -300,6 +300,13 @@ void InstructionSelector::VisitInt32Mul(Node* node) {
 }
 
 
+void InstructionSelector::VisitInt32MulHigh(Node* node) {
+  MipsOperandGenerator g(this);
+  Emit(kMipsMulHigh, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)),
+       g.UseRegister(node->InputAt(1)));
+}
+
+
 void InstructionSelector::VisitInt32Div(Node* node) {
   MipsOperandGenerator g(this);
   Int32BinopMatcher m(node);