Commit 2ce3a8e9 authored by Zhao Jiazhong's avatar Zhao Jiazhong Committed by Commit Bot

[mips][wasm-simd][liftoff] Implement ge of i8x16, i16x8 and i32x4 and bitselect

Port 97a4b795
https://crrev.com/c/2162366

Port f8be9948
https://crrev.com/c/2166959

Change-Id: Id0cebfe0761ff75fb95c9ceacf95e53fee12eb73
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2168978Reviewed-by: 's avatarClemens Backes <clemensb@chromium.org>
Commit-Queue: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Cr-Commit-Position: refs/heads/master@{#67434}
parent 6a0e7224
......@@ -1594,6 +1594,16 @@ void LiftoffAssembler::emit_i8x16_ne(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_i8x16_ne");
}
void LiftoffAssembler::emit_i8x16_ge_s(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_i8x16_ge_s");
}
void LiftoffAssembler::emit_i8x16_ge_u(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_i8x16_ge_u");
}
void LiftoffAssembler::emit_i16x8_eq(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
......@@ -1607,6 +1617,16 @@ void LiftoffAssembler::emit_i16x8_ne(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_i16x8_ne");
}
void LiftoffAssembler::emit_i16x8_ge_s(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_i16x8_ge_s");
}
void LiftoffAssembler::emit_i16x8_ge_u(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_i16x8_ge_u");
}
void LiftoffAssembler::emit_i32x4_eq(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
......@@ -1620,6 +1640,16 @@ void LiftoffAssembler::emit_i32x4_ne(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_i32x4_ne");
}
void LiftoffAssembler::emit_i32x4_ge_s(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_i32x4_ge_s");
}
void LiftoffAssembler::emit_i32x4_ge_u(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_i32x4_ge_u");
}
void LiftoffAssembler::emit_f32x4_eq(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
......@@ -1706,6 +1736,13 @@ void LiftoffAssembler::emit_s128_and_not(LiftoffRegister dst,
bailout(kSimd, "emit_s128_and_not");
}
void LiftoffAssembler::emit_s128_select(LiftoffRegister dst,
LiftoffRegister src1,
LiftoffRegister src2,
LiftoffRegister src3) {
bailout(kSimd, "emit_s128_select");
}
void LiftoffAssembler::emit_i8x16_neg(LiftoffRegister dst,
LiftoffRegister src) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
......
......@@ -1412,6 +1412,16 @@ void LiftoffAssembler::emit_i8x16_ne(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_i8x16_ne");
}
void LiftoffAssembler::emit_i8x16_ge_s(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
cle_s_b(dst.fp().toW(), rhs.fp().toW(), lhs.fp().toW());
}
void LiftoffAssembler::emit_i8x16_ge_u(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
cle_u_b(dst.fp().toW(), rhs.fp().toW(), lhs.fp().toW());
}
void LiftoffAssembler::emit_i16x8_eq(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
......@@ -1428,6 +1438,16 @@ void LiftoffAssembler::emit_i16x8_ne(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_i16x8_ne");
}
void LiftoffAssembler::emit_i16x8_ge_s(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
cle_s_h(dst.fp().toW(), rhs.fp().toW(), lhs.fp().toW());
}
void LiftoffAssembler::emit_i16x8_ge_u(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
cle_u_h(dst.fp().toW(), rhs.fp().toW(), lhs.fp().toW());
}
void LiftoffAssembler::emit_i32x4_eq(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
......@@ -1444,6 +1464,16 @@ void LiftoffAssembler::emit_i32x4_ne(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_i32x4_ne");
}
void LiftoffAssembler::emit_i32x4_ge_s(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
cle_s_w(dst.fp().toW(), rhs.fp().toW(), lhs.fp().toW());
}
void LiftoffAssembler::emit_i32x4_ge_u(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
cle_u_w(dst.fp().toW(), rhs.fp().toW(), lhs.fp().toW());
}
void LiftoffAssembler::emit_f32x4_eq(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
......@@ -1548,6 +1578,19 @@ void LiftoffAssembler::emit_s128_and_not(LiftoffRegister dst,
bailout(kSimd, "emit_s128_and_not");
}
void LiftoffAssembler::emit_s128_select(LiftoffRegister dst,
LiftoffRegister src1,
LiftoffRegister src2,
LiftoffRegister src3) {
if (dst == src3) {
bsel_v(dst.fp().toW(), src2.fp().toW(), src1.fp().toW());
} else {
xor_v(kSimd128ScratchReg, src1.fp().toW(), src2.fp().toW());
and_v(kSimd128ScratchReg, kSimd128ScratchReg, src3.fp().toW());
xor_v(dst.fp().toW(), kSimd128ScratchReg, src2.fp().toW());
}
}
void LiftoffAssembler::emit_i8x16_neg(LiftoffRegister dst,
LiftoffRegister src) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment