[maglev] Properly use MachineRepresentation in RegAlloc

We need to use MachineRepresentation to properly distinguish
the types in compiler::UnallocatedOperand.

Bug: v8:7700
Change-Id: I4273512a00290bb85b09aeb3788643e346be03f7
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3602515Reviewed-by: Leszek Swirski <leszeks@chromium.org>
Auto-Submit: Victor Gomes <victorgomes@chromium.org>
Commit-Queue: Victor Gomes <victorgomes@chromium.org>
Cr-Commit-Position: refs/heads/main@{#80140}

src/maglev/maglev-ir.h

@@ -774,6 +774,17 @@ class ValueNode : public Node {
             ValueRepresentation::kFloat64);
   }
 
+  constexpr MachineRepresentation GetMachineRepresentation() const {
+    switch (properties().value_representation()) {
+      case ValueRepresentation::kTagged:
+        return MachineRepresentation::kTagged;
+      case ValueRepresentation::kInt32:
+        return MachineRepresentation::kWord32;
+      case ValueRepresentation::kFloat64:
+        return MachineRepresentation::kFloat64;
+    }
+  }
+
   void AddRegister(Register reg) {
     DCHECK(!use_double_register());
     registers_with_result_.set(reg);
@@ -811,8 +822,8 @@ class ValueNode : public Node {
   compiler::AllocatedOperand allocation() const {
     if (has_register()) {
       return compiler::AllocatedOperand(compiler::LocationOperand::REGISTER,
-                                        MachineRepresentation::kTagged,
-                                        registers_with_result_.first().code());
+                                        GetMachineRepresentation(),
+                                        FirstRegisterCode());
     }
     DCHECK(is_spilled());
     return compiler::AllocatedOperand::cast(spill_or_hint_);
@@ -834,6 +845,13 @@ class ValueNode : public Node {
     }
   }
 
+  int FirstRegisterCode() const {
+    if (use_double_register()) {
+      return double_registers_with_result_.first().code();
+    }
+    return registers_with_result_.first().code();
+  }
+
   // Rename for better pairing with `end_id`.
   NodeIdT start_id() const { return id(); }
 

src/maglev/maglev-regalloc.cc

@@ -417,7 +417,7 @@ void StraightForwardRegisterAllocator::AllocateNodeResult(ValueNode* node) {
     DCHECK_LT(operand.fixed_slot_index(), 0);
     // Set the stack slot to exactly where the value is.
     compiler::AllocatedOperand location(compiler::AllocatedOperand::STACK_SLOT,
-                                        MachineRepresentation::kTagged,
+                                        node->GetMachineRepresentation(),
                                         operand.fixed_slot_index());
     node->result().SetAllocated(location);
     node->Spill(location);
@@ -469,6 +469,7 @@ void StraightForwardRegisterAllocator::DropRegisterValue(
   DCHECK(!registers.free().has(reg));
 
   ValueNode* node = registers.GetValue(reg);
+  MachineRepresentation mach_repr = node->GetMachineRepresentation();
 
   // Remove the register from the node's list.
   node->RemoveRegister(reg);
@@ -482,11 +483,9 @@ void StraightForwardRegisterAllocator::DropRegisterValue(
     registers.SetValue(target_reg, node);
     // Emit a gapmove.
     compiler::AllocatedOperand source(compiler::LocationOperand::REGISTER,
-                                      MachineRepresentation::kTagged,
-                                      reg.code());
+                                      mach_repr, reg.code());
     compiler::AllocatedOperand target(compiler::LocationOperand::REGISTER,
-                                      MachineRepresentation::kTagged,
-                                      target_reg.code());
+                                      mach_repr, target_reg.code());
 
     if (FLAG_trace_maglev_regalloc) {
       printing_visitor_->os()
@@ -773,7 +772,7 @@ compiler::AllocatedOperand StraightForwardRegisterAllocator::ForceAllocate(
     registers.RemoveFromFree(reg);
   } else if (registers.GetValue(reg) == node) {
     return compiler::AllocatedOperand(compiler::LocationOperand::REGISTER,
-                                      MachineRepresentation::kTagged,
+                                      node->GetMachineRepresentation(),
                                       reg.code());
   } else {
     DropRegisterValue(registers, reg);
@@ -783,7 +782,8 @@ compiler::AllocatedOperand StraightForwardRegisterAllocator::ForceAllocate(
 #endif
   registers.SetValue(reg, node);
   return compiler::AllocatedOperand(compiler::LocationOperand::REGISTER,
-                                    MachineRepresentation::kTagged, reg.code());
+                                    node->GetMachineRepresentation(),
+                                    reg.code());
 }
 
 compiler::AllocatedOperand StraightForwardRegisterAllocator::ForceAllocate(
@@ -808,7 +808,8 @@ compiler::InstructionOperand RegisterFrameState<RegisterT>::TryAllocateRegister(
   // Simply update the state anyway.
   SetValue(reg, node);
   return compiler::AllocatedOperand(compiler::LocationOperand::REGISTER,
-                                    MachineRepresentation::kTagged, reg.code());
+                                    node->GetMachineRepresentation(),
+                                    reg.code());
 }
 
 void StraightForwardRegisterAllocator::AssignTemporaries(NodeBase* node) {
@@ -895,9 +896,11 @@ void StraightForwardRegisterAllocator::MergeRegisterValues(ControlNode* control,
     RegisterMerge* merge;
     LoadMergeState(state, &node, &merge);
 
+    MachineRepresentation mach_repr = node == nullptr
+                                          ? MachineRepresentation::kTagged
+                                          : node->GetMachineRepresentation();
     compiler::AllocatedOperand register_info = {
-        compiler::LocationOperand::REGISTER, MachineRepresentation::kTagged,
-        reg.code()};
+        compiler::LocationOperand::REGISTER, mach_repr, reg.code()};
 
     ValueNode* incoming = nullptr;
     if (!general_registers_.free().has(reg)) {