Commit 28f56982 authored by Liu Yu's avatar Liu Yu Committed by V8 LUCI CQ

[loong64][mips][runtime] ClobberDoubleRegisters rewritten

Port daa3ce75

Bug: v8:11798
Change-Id: I693b98309b62bd1cb9c7d0d1cac1b28189085d5d
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3523580
Auto-Submit: Yu Liu <liuyu@loongson.cn>
Reviewed-by: 's avatarIgor Sheludko <ishell@chromium.org>
Commit-Queue: Igor Sheludko <ishell@chromium.org>
Cr-Commit-Position: refs/heads/main@{#79706}
parent 3fd463c6
......@@ -29,6 +29,13 @@ namespace internal {
V(f16) V(f17) V(f18) V(f19) V(f20) V(f21) V(f22) V(f23) \
V(f24) V(f25) V(f26) V(f27) V(f28) V(f29) V(f30) V(f31)
// Currently, MIPS just use even float point register, except
// for C function param registers.
#define DOUBLE_USE_REGISTERS(V) \
V(f0) V(f2) V(f4) V(f6) V(f8) V(f10) V(f12) V(f13) \
V(f14) V(f15) V(f16) V(f18) V(f20) V(f22) V(f24) V(f26) \
V(f28) V(f30)
#define FLOAT_REGISTERS DOUBLE_REGISTERS
#define SIMD128_REGISTERS(V) \
V(w0) V(w1) V(w2) V(w3) V(w4) V(w5) V(w6) V(w7) \
......
......@@ -29,6 +29,13 @@ namespace internal {
V(f16) V(f17) V(f18) V(f19) V(f20) V(f21) V(f22) V(f23) \
V(f24) V(f25) V(f26) V(f27) V(f28) V(f29) V(f30) V(f31)
// Currently, MIPS64 just use even float point register, except
// for C function param registers.
#define DOUBLE_USE_REGISTERS(V) \
V(f0) V(f2) V(f4) V(f6) V(f8) V(f10) V(f12) V(f13) \
V(f14) V(f15) V(f16) V(f17) V(f18) V(f19) V(f20) V(f22) \
V(f24) V(f26) V(f28) V(f30)
#define FLOAT_REGISTERS DOUBLE_REGISTERS
#define SIMD128_REGISTERS(V) \
V(w0) V(w1) V(w2) V(w3) V(w4) V(w5) V(w6) V(w7) \
......
......@@ -13,6 +13,12 @@
#include "src/codegen/ia32/register-ia32.h"
#elif V8_HOST_ARCH_X64
#include "src/codegen/x64/register-x64.h"
#elif V8_HOST_ARCH_LOONG64
#include "src/codegen/loong64/register-loong64.h"
#elif V8_HOST_ARCH_MIPS
#include "src/codegen/mips/register-mips.h"
#elif V8_HOST_ARCH_MIPS64
#include "src/codegen/mips64/register-mips64.h"
#endif
namespace v8 {
......@@ -39,18 +45,33 @@ namespace internal {
#elif V8_HOST_ARCH_ARM64
#define CLOBBER_REGISTER(R) __asm__ volatile("fmov " #R ",xzr" :::);
#endif // V8_HOST_ARCH_X64 || V8_HOST_ARCH_IA32 || V8_HOST_ARCH_ARM64
#elif V8_HOST_ARCH_LOONG64
#define CLOBBER_REGISTER(R) __asm__ volatile("movgr2fr.d $" #R ",$zero" :::);
#elif V8_HOST_ARCH_MIPS
#define CLOBBER_USE_REGISTER(R) __asm__ volatile("mtc1 $zero,$" #R :::);
#elif V8_HOST_ARCH_MIPS64
#define CLOBBER_USE_REGISTER(R) __asm__ volatile("dmtc1 $zero,$" #R :::);
#endif // V8_HOST_ARCH_X64 || V8_HOST_ARCH_IA32 || V8_HOST_ARCH_ARM64 ||
// V8_HOST_ARCH_LOONG64 || V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64
#endif // V8_CC_MSVC
double ClobberDoubleRegisters(double x1, double x2, double x3, double x4) {
// clobber all double registers
#ifdef CLOBBER_REGISTER
#if defined(CLOBBER_REGISTER)
DOUBLE_REGISTERS(CLOBBER_REGISTER)
#undef CLOBBER_REGISTER
return 0;
#elif defined(CLOBBER_USE_REGISTER)
DOUBLE_USE_REGISTERS(CLOBBER_USE_REGISTER)
#undef CLOBBER_USE_REGISTER
return 0;
#else
// TODO(v8:11798): This clobbers only subset of registers depending on
// compiler, Rewrite this in assembly to really clobber all registers. GCC for
......
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