Commit 25456de1 authored by Ng Zhi An's avatar Ng Zhi An Committed by Commit Bot

[wasm-simd] Fix incorrect operands for i64x2 add and sub

The instruction selector for these two operations use VisitRROFloat
which uses and operand for the second input (operand1). The codegen
assumes it is a register, which is wrong. This fixes it to be an
operand.

Change-Id: Ic27ba2c0520ba6e15963b01af7593411ec2a34e9
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1958052Reviewed-by: 's avatarDeepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#65533}
parent 45bb4498
......@@ -2043,12 +2043,12 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
}
case kIA32I64x2Add: {
__ Paddq(i.OutputSimd128Register(), i.InputSimd128Register(0),
i.InputSimd128Register(1));
i.InputOperand(1));
break;
}
case kIA32I64x2Sub: {
__ Psubq(i.OutputSimd128Register(), i.InputSimd128Register(0),
i.InputSimd128Register(1));
i.InputOperand(1));
break;
}
case kIA32I64x2Mul: {
......
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