X87: [wasm] Int64Lowering of I64ShrU and I64ShrS on ia32.

  port 240b7db9 (r34630)

  original commit message:
  I implemented I64ShrU and I64ShrS the same as I64Shl in https://codereview.chromium.org/1756863002

BUG=

Review URL: https://codereview.chromium.org/1783703003

Cr-Commit-Position: refs/heads/master@{#34656}

src/compiler/x87/code-generator-x87.cc

@@ -765,12 +765,28 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
         __ sar_cl(i.OutputOperand());
       }
       break;
-    case kX87PairShl:
+    case kX87ShlPair:
       if (HasImmediateInput(instr, 2)) {
-        __ PairShl(i.InputRegister(1), i.InputRegister(0), i.InputInt6(2));
+        __ ShlPair(i.InputRegister(1), i.InputRegister(0), i.InputInt6(2));
       } else {
         // Shift has been loaded into CL by the register allocator.
-        __ PairShl_cl(i.InputRegister(1), i.InputRegister(0));
+        __ ShlPair_cl(i.InputRegister(1), i.InputRegister(0));
+      }
+      break;
+    case kX87ShrPair:
+      if (HasImmediateInput(instr, 2)) {
+        __ ShrPair(i.InputRegister(1), i.InputRegister(0), i.InputInt6(2));
+      } else {
+        // Shift has been loaded into CL by the register allocator.
+        __ ShrPair_cl(i.InputRegister(1), i.InputRegister(0));
+      }
+      break;
+    case kX87SarPair:
+      if (HasImmediateInput(instr, 2)) {
+        __ SarPair(i.InputRegister(1), i.InputRegister(0), i.InputInt6(2));
+      } else {
+        // Shift has been loaded into CL by the register allocator.
+        __ SarPair_cl(i.InputRegister(1), i.InputRegister(0));
       }
       break;
     case kX87Ror:

src/compiler/x87/instruction-codes-x87.h

@@ -31,7 +31,9 @@ namespace compiler {
   V(X87Shl)                        \
   V(X87Shr)                        \
   V(X87Sar)                        \
-  V(X87PairShl)                    \
+  V(X87ShlPair)                    \
+  V(X87ShrPair)                    \
+  V(X87SarPair)                    \
   V(X87Ror)                        \
   V(X87Lzcnt)                      \
   V(X87Popcnt)                     \

src/compiler/x87/instruction-selector-x87.cc

@@ -562,12 +562,50 @@ void InstructionSelector::VisitWord32PairShl(Node* node) {
       g.DefineAsFixed(node, eax),
       g.DefineAsFixed(NodeProperties::FindProjection(node, 1), edx)};
 
-  Emit(kX87PairShl, 2, outputs, 3, inputs);
+  Emit(kX87ShlPair, 2, outputs, 3, inputs);
 }
 
-void InstructionSelector::VisitWord32PairShr(Node* node) { UNIMPLEMENTED(); }
+void InstructionSelector::VisitWord32PairShr(Node* node) {
+  X87OperandGenerator g(this);
+
+  Node* shift = node->InputAt(2);
+  InstructionOperand shift_operand;
+  if (g.CanBeImmediate(shift)) {
+    shift_operand = g.UseImmediate(shift);
+  } else {
+    shift_operand = g.UseFixed(shift, ecx);
+  }
+  InstructionOperand inputs[] = {g.UseFixed(node->InputAt(0), eax),
+                                 g.UseFixed(node->InputAt(1), edx),
+                                 shift_operand};
+
+  InstructionOperand outputs[] = {
+      g.DefineAsFixed(node, eax),
+      g.DefineAsFixed(NodeProperties::FindProjection(node, 1), edx)};
+
+  Emit(kX87ShrPair, 2, outputs, 3, inputs);
+}
 
-void InstructionSelector::VisitWord32PairSar(Node* node) { UNIMPLEMENTED(); }
+void InstructionSelector::VisitWord32PairSar(Node* node) {
+  X87OperandGenerator g(this);
+
+  Node* shift = node->InputAt(2);
+  InstructionOperand shift_operand;
+  if (g.CanBeImmediate(shift)) {
+    shift_operand = g.UseImmediate(shift);
+  } else {
+    shift_operand = g.UseFixed(shift, ecx);
+  }
+  InstructionOperand inputs[] = {g.UseFixed(node->InputAt(0), eax),
+                                 g.UseFixed(node->InputAt(1), edx),
+                                 shift_operand};
+
+  InstructionOperand outputs[] = {
+      g.DefineAsFixed(node, eax),
+      g.DefineAsFixed(NodeProperties::FindProjection(node, 1), edx)};
+
+  Emit(kX87SarPair, 2, outputs, 3, inputs);
+}
 
 void InstructionSelector::VisitWord32Ror(Node* node) {
   VisitShift(this, node, kX87Ror);

src/x87/assembler-x87.cc

@@ -939,7 +939,6 @@ void Assembler::sar_cl(const Operand& dst) {
   emit_operand(edi, dst);
 }
 
-
 void Assembler::sbb(Register dst, const Operand& src) {
   EnsureSpace ensure_space(this);
   EMIT(0x1B);
@@ -983,15 +982,6 @@ void Assembler::shl_cl(const Operand& dst) {
   emit_operand(esp, dst);
 }
 
-
-void Assembler::shrd(Register dst, const Operand& src) {
-  EnsureSpace ensure_space(this);
-  EMIT(0x0F);
-  EMIT(0xAD);
-  emit_operand(dst, src);
-}
-
-
 void Assembler::shr(const Operand& dst, uint8_t imm8) {
   EnsureSpace ensure_space(this);
   DCHECK(is_uint5(imm8));  // illegal shift count
@@ -1012,6 +1002,21 @@ void Assembler::shr_cl(const Operand& dst) {
   emit_operand(ebp, dst);
 }
 
+void Assembler::shrd(Register dst, Register src, uint8_t shift) {
+  DCHECK(is_uint5(shift));
+  EnsureSpace ensure_space(this);
+  EMIT(0x0F);
+  EMIT(0xAC);
+  emit_operand(dst, Operand(src));
+  EMIT(shift);
+}
+
+void Assembler::shrd_cl(const Operand& dst, Register src) {
+  EnsureSpace ensure_space(this);
+  EMIT(0x0F);
+  EMIT(0xAD);
+  emit_operand(src, dst);
+}
 
 void Assembler::sub(const Operand& dst, const Immediate& x) {
   EnsureSpace ensure_space(this);

src/x87/assembler-x87.h

@@ -731,21 +731,20 @@ class Assembler : public AssemblerBase {
 
   void sbb(Register dst, const Operand& src);
 
-  void shld(Register dst, Register src, uint8_t shift);
-  void shld_cl(Register dst, Register src);
-
   void shl(Register dst, uint8_t imm8) { shl(Operand(dst), imm8); }
   void shl(const Operand& dst, uint8_t imm8);
   void shl_cl(Register dst) { shl_cl(Operand(dst)); }
   void shl_cl(const Operand& dst);
-
-  void shrd(Register dst, Register src) { shrd(dst, Operand(src)); }
-  void shrd(Register dst, const Operand& src);
+  void shld(Register dst, Register src, uint8_t shift);
+  void shld_cl(Register dst, Register src);
 
   void shr(Register dst, uint8_t imm8) { shr(Operand(dst), imm8); }
   void shr(const Operand& dst, uint8_t imm8);
   void shr_cl(Register dst) { shr_cl(Operand(dst)); }
   void shr_cl(const Operand& dst);
+  void shrd(Register dst, Register src, uint8_t shift);
+  void shrd_cl(Register dst, Register src) { shrd_cl(Operand(dst), src); }
+  void shrd_cl(const Operand& dst, Register src);
 
   void sub(Register dst, const Immediate& imm) { sub(Operand(dst), imm); }
   void sub(const Operand& dst, const Immediate& x);

src/x87/code-stubs-x87.cc

@@ -241,7 +241,7 @@ void DoubleToIStub::Generate(MacroAssembler* masm) {
           Immediate(static_cast<uint32_t>(Double::kSignificandMask >> 32)));
   __ add(result_reg,
          Immediate(static_cast<uint32_t>(Double::kHiddenBit >> 32)));
-  __ shrd(result_reg, scratch1);
+  __ shrd_cl(scratch1, result_reg);
   __ shr_cl(result_reg);
   __ test(ecx, Immediate(32));
   {

src/x87/disasm-x87.cc

@@ -1150,7 +1150,8 @@ int DisassemblerX87::InstructionDecode(v8::internal::Vector<char> out_buffer,
             data += SetCC(data);
           } else if ((f0byte & 0xF0) == 0x40) {
             data += CMov(data);
-          } else if (f0byte == 0xA4) {
+          } else if (f0byte == 0xA4 || f0byte == 0xAC) {
+            // shld, shrd
             data += 2;
             AppendToBuffer("%s ", f0mnem);
             int mod, regop, rm;
@@ -1160,7 +1161,7 @@ int DisassemblerX87::InstructionDecode(v8::internal::Vector<char> out_buffer,
             AppendToBuffer("%s,%s,%d", NameOfCPURegister(rm),
                            NameOfCPURegister(regop), static_cast<int>(imm8));
           } else if (f0byte == 0xAB || f0byte == 0xA5 || f0byte == 0xAD) {
-            // shrd, shld_cl, bts
+            // shrd_cl, shld_cl, bts
             data += 2;
             AppendToBuffer("%s ", f0mnem);
             int mod, regop, rm;

src/x87/macro-assembler-x87.cc

@@ -597,7 +597,7 @@ void MacroAssembler::DebugBreak() {
   call(ces.GetCode(), RelocInfo::DEBUGGER_STATEMENT);
 }
 
-void MacroAssembler::PairShl(Register high, Register low, uint8_t shift) {
+void MacroAssembler::ShlPair(Register high, Register low, uint8_t shift) {
   if (shift >= 32) {
     mov(high, low);
     shl(high, shift - 32);
@@ -608,7 +608,7 @@ void MacroAssembler::PairShl(Register high, Register low, uint8_t shift) {
   }
 }
 
-void MacroAssembler::PairShl_cl(Register high, Register low) {
+void MacroAssembler::ShlPair_cl(Register high, Register low) {
   shld_cl(high, low);
   shl_cl(low);
   Label done;
@@ -619,6 +619,50 @@ void MacroAssembler::PairShl_cl(Register high, Register low) {
   bind(&done);
 }
 
+void MacroAssembler::ShrPair(Register high, Register low, uint8_t shift) {
+  if (shift >= 32) {
+    mov(low, high);
+    shr(low, shift - 32);
+    xor_(high, high);
+  } else {
+    shrd(high, low, shift);
+    shr(high, shift);
+  }
+}
+
+void MacroAssembler::ShrPair_cl(Register high, Register low) {
+  shrd_cl(low, high);
+  shr_cl(high);
+  Label done;
+  test(ecx, Immediate(0x20));
+  j(equal, &done, Label::kNear);
+  mov(low, high);
+  xor_(high, high);
+  bind(&done);
+}
+
+void MacroAssembler::SarPair(Register high, Register low, uint8_t shift) {
+  if (shift >= 32) {
+    mov(low, high);
+    sar(low, shift - 32);
+    sar(high, 31);
+  } else {
+    shrd(high, low, shift);
+    sar(high, shift);
+  }
+}
+
+void MacroAssembler::SarPair_cl(Register high, Register low) {
+  shrd_cl(low, high);
+  sar_cl(high);
+  Label done;
+  test(ecx, Immediate(0x20));
+  j(equal, &done, Label::kNear);
+  mov(low, high);
+  sar(high, 31);
+  bind(&done);
+}
+
 bool MacroAssembler::IsUnsafeImmediate(const Immediate& x) {
   static const int kMaxImmediateBits = 17;
   if (!RelocInfo::IsNone(x.rmode_)) return false;

src/x87/macro-assembler-x87.h

@@ -360,8 +360,12 @@ class MacroAssembler: public Assembler {
                       const ParameterCount& actual, InvokeFlag flag,
                       const CallWrapper& call_wrapper);
 
-  void PairShl(Register high, Register low, uint8_t imm8);
-  void PairShl_cl(Register high, Register low);
+  void ShlPair(Register high, Register low, uint8_t imm8);
+  void ShlPair_cl(Register high, Register low);
+  void ShrPair(Register high, Register low, uint8_t imm8);
+  void ShrPair_cl(Register high, Register src);
+  void SarPair(Register high, Register low, uint8_t imm8);
+  void SarPair_cl(Register high, Register low);
 
   // Expression support
   // Support for constant splitting.

test/cctest/test-disasm-x87.cc

@@ -121,7 +121,8 @@ TEST(DisasmIa320) {
   __ imul(edx, ecx);
   __ shld(edx, ecx, 10);
   __ shld_cl(edx, ecx);
-  __ shrd(edx, ecx);
+  __ shrd(edx, ecx, 10);
+  __ shrd_cl(edx, ecx);
   __ bts(edx, ecx);
   __ bts(Operand(ebx, ecx, times_4, 0), ecx);
   __ nop();
@@ -221,7 +222,7 @@ TEST(DisasmIa320) {
   __ shl(Operand(ebx, ecx, times_4, 10000), 1);
   __ shl(Operand(ebx, ecx, times_4, 10000), 6);
   __ shl_cl(Operand(ebx, ecx, times_4, 10000));
-  __ shrd(edx, Operand(ebx, ecx, times_4, 10000));
+  __ shrd_cl(Operand(ebx, ecx, times_4, 10000), edx);
   __ shr(edx, 1);
   __ shr(edx, 7);
   __ shr_cl(edx);