[loong64][mips64][regalloc] Fix some errors in gap resolver

Related to commit 2b6cbda0

Bug: v8:5210, chromium:1269989, chromium:1313647
Change-Id: I0046bdb3fe76a3eaf45e773b1fab87b65476cc1b
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3690457
Auto-Submit: Liu Yu <liuyu@loongson.cn>
Commit-Queue: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Reviewed-by: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Cr-Commit-Position: refs/heads/main@{#80954}

src/compiler/backend/loong64/code-generator-loong64.cc

@@ -2444,7 +2444,8 @@ void CodeGenerator::MoveToTempLocation(InstructionOperand* source) {
   } else if (move_cycle_.scratch_fpreg.has_value()) {
     // A scratch fp register is available for this rep.
     if (!IsFloatingPoint(rep)) {
-      AllocatedOperand scratch(LocationOperand::REGISTER, rep,
+      AllocatedOperand scratch(LocationOperand::REGISTER,
+                               MachineRepresentation::kFloat64,
                                move_cycle_.scratch_fpreg->code());
       Loong64OperandConverter g(this, nullptr);
       if (source->IsStackSlot()) {
@@ -2546,12 +2547,21 @@ void CodeGenerator::SetPendingMove(MoveOperands* move) {
   }
   if (src->IsAnyStackSlot() || dst->IsAnyStackSlot()) {
     Loong64OperandConverter g(this, nullptr);
+    bool src_need_scratch = false;
+    bool dst_need_scratch = false;
+    if (src->IsAnyStackSlot()) {
       MemOperand src_mem = g.ToMemOperand(src);
+      src_need_scratch =
+          (!is_int16(src_mem.offset()) || (src_mem.offset() & 0b11) != 0) &&
+          (!is_int12(src_mem.offset()) && !src_mem.hasIndexReg());
+    }
+    if (dst->IsAnyStackSlot()) {
       MemOperand dst_mem = g.ToMemOperand(dst);
-    if (((!is_int16(src_mem.offset()) || (src_mem.offset() & 0b11) != 0) &&
-         (!is_int12(src_mem.offset()) && !src_mem.hasIndexReg())) ||
-        ((!is_int16(dst_mem.offset()) || (dst_mem.offset() & 0b11) != 0) &&
-         (!is_int12(dst_mem.offset()) && dst_mem.hasIndexReg()))) {
+      dst_need_scratch =
+          (!is_int16(dst_mem.offset()) || (dst_mem.offset() & 0b11) != 0) &&
+          (!is_int12(dst_mem.offset()) && !dst_mem.hasIndexReg());
+    }
+    if (src_need_scratch || dst_need_scratch) {
       Register temp = temps.Acquire();
       move_cycle_.scratch_regs.set(temp);
     }

src/compiler/backend/mips64/code-generator-mips64.cc

@@ -4442,20 +4442,29 @@ void CodeGenerator::SetPendingMove(MoveOperands* move) {
   InstructionOperand* dst = &move->destination();
   UseScratchRegisterScope temps(tasm());
   if (src->IsConstant() && dst->IsFPLocationOperand()) {
+    Register temp = temps.Acquire();
+    move_cycle_.scratch_regs.set(temp);
+  } else if (src->IsAnyStackSlot() || dst->IsAnyStackSlot()) {
     MipsOperandConverter g(this, nullptr);
+    bool src_need_scratch = false;
+    bool dst_need_scratch = false;
+    if (src->IsAnyStackSlot()) {
       MemOperand src_mem = g.ToMemOperand(src);
+      src_need_scratch =
+          (!is_int16(src_mem.offset())) || (((src_mem.offset() & 0b111) != 0) &&
+                                            !is_int16(src_mem.offset() + 4));
+    }
+    if (dst->IsAnyStackSlot()) {
       MemOperand dst_mem = g.ToMemOperand(dst);
-    if (((!is_int16(src_mem.offset())) || (((src_mem.offset() & 0b111) != 0) &&
-                                           !is_int16(src_mem.offset() + 4))) ||
-        ((!is_int16(dst_mem.offset())) || (((dst_mem.offset() & 0b111) != 0) &&
-                                           !is_int16(dst_mem.offset() + 4)))) {
-      Register temp = temps.Acquire();
-      move_cycle_.scratch_regs.set(temp);
+      dst_need_scratch =
+          (!is_int16(dst_mem.offset())) || (((dst_mem.offset() & 0b111) != 0) &&
+                                            !is_int16(dst_mem.offset() + 4));
     }
-  } else if (src->IsAnyStackSlot() || dst->IsAnyStackSlot()) {
+    if (src_need_scratch || dst_need_scratch) {
       Register temp = temps.Acquire();
       move_cycle_.scratch_regs.set(temp);
     }
+  }
 }
 
 void CodeGenerator::AssembleMove(InstructionOperand* source,