ARM64: Fix disassembly of branch targets.

R=ulan@chromium.org

Review URL: https://codereview.chromium.org/225743004

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@20543 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
parent 638a53ec
...@@ -1632,10 +1632,9 @@ int Disassembler::SubstituteBranchTargetField(Instruction* instr, ...@@ -1632,10 +1632,9 @@ int Disassembler::SubstituteBranchTargetField(Instruction* instr,
offset <<= kInstructionSizeLog2; offset <<= kInstructionSizeLog2;
char sign = '+'; char sign = '+';
if (offset < 0) { if (offset < 0) {
offset = -offset;
sign = '-'; sign = '-';
} }
AppendToOutput("#%c0x%" PRIx64 " (addr %p)", sign, offset, AppendToOutput("#%c0x%" PRIx64 " (addr %p)", sign, Abs(offset),
instr->InstructionAtOffset(offset), Instruction::NO_CHECK); instr->InstructionAtOffset(offset), Instruction::NO_CHECK);
return 8; return 8;
} }
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment