[riscv64][wasm] Fix OSR shadow stack violation

Port 06a2c2e0

Change-Id: I23cbeabc14562168b5060f435beb77778dcfccdc
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2831171
Commit-Queue: Brice Dobry <brice.dobry@futurewei.com>
Reviewed-by: Brice Dobry <brice.dobry@futurewei.com>
Cr-Commit-Position: refs/heads/master@{#74011}

src/builtins/riscv64/builtins-riscv64.cc

@@ -2932,6 +2932,10 @@ void Builtins::Generate_GenericJSToWasmWrapper(MacroAssembler* masm) {
   __ Trap();
 }
 
+void Builtins::Generate_WasmOnStackReplace(MacroAssembler* masm) {
+  // Only needed on x64.
+  __ Trap();
+}
 namespace {
 
 int AddressOffset(ExternalReference ref0, ExternalReference ref1) {

src/wasm/baseline/riscv64/liftoff-assembler-riscv64.h

@@ -408,6 +408,8 @@ void LiftoffAssembler::SpillInstance(Register instance) {
   Sd(instance, liftoff::GetInstanceOperand());
 }
 
+void LiftoffAssembler::ResetOSRTarget() {}
+
 void LiftoffAssembler::FillInstanceInto(Register dst) {
   Ld(dst, liftoff::GetInstanceOperand());
 }
@@ -2586,6 +2588,7 @@ void LiftoffAssembler::DeallocateStackSlot(uint32_t size) {
   Add64(sp, sp, Operand(size));
 }
 
+void LiftoffAssembler::MaybeOSR() {}
 
 void LiftoffStackSlots::Construct(int param_slots) {
   DCHECK_LT(0, slots_.size());