cppgc: Conservative stack scanning for arm32

Bug: chromium:1056170
Change-Id: I417a0f05bcd185e969fb087a6b132e88c3fa3a5d
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2129635Reviewed-by: Anton Bikineev <bikineev@chromium.org>
Commit-Queue: Michael Lippautz <mlippautz@chromium.org>
Cr-Commit-Position: refs/heads/master@{#67011}

BUILD.gn

@@ -349,7 +349,7 @@ config("libbase_config") {
 # This config should be applied to code using the cppgc_base.
 config("cppgc_base_config") {
   if (is_clang) {
-    if (target_cpu == "x64" || target_cpu == "x86") {
+    if (target_cpu == "x64" || target_cpu == "x86" || target_cpu == "arm") {
       defines = [ "CPPGC_SUPPORTS_CONSERVATIVE_STACK_SCAN" ]
     }
   }
@@ -3972,6 +3972,8 @@ v8_source_set("cppgc_base") {
       sources += [ "src/heap/cppgc/asm/x64/push_registers_clang.cc" ]
     } else if (target_cpu == "x86") {
       sources += [ "src/heap/cppgc/asm/ia32/push_registers_clang.cc" ]
+    } else if (target_cpu == "arm") {
+      sources += [ "src/heap/cppgc/asm/arm/push_registers_clang.cc" ]
     }
   }
 

src/heap/cppgc/asm/arm/push_registers_clang.cc

+// Copyright 2020 the V8 project authors. All rights reserved.
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+// Push all callee-saved registers to get them on the stack for conservative
+// stack scanning.
+//
+// See asm/x64/push_registers_clang.cc for why the function is not generated
+// using clang.
+//
+// Do not depend on V8_TARGET_OS_* defines as some embedders may override the
+// GN toolchain (e.g. ChromeOS) and not provide them.
+
+// We maintain 8-byte alignment at calls by pushing an additional
+// non-callee-saved register (r3).
+//
+// Calling convention source:
+// https://en.wikipedia.org/wiki/Calling_convention#ARM_(A32)
+// http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.faqs/ka4127.html
+asm(".globl PushAllRegistersAndIterateStack             \n"
+    ".hidden PushAllRegistersAndIterateStack            \n"
+    "PushAllRegistersAndIterateStack:                   \n"
+    // Push all callee-saved registers and save return address.
+    // Only {r4-r11} are callee-saved registers. Push r3 in addition to align
+    // the stack back to 8 bytes.
+    "  push {r3-r11, lr}                                \n"
+    // Pass 1st parameter (r0) unchanged (Stack*).
+    // Pass 2nd parameter (r1) unchanged (StackVisitor*).
+    // Save 3rd parameter (r2; IterateStackCallback).
+    "  mov r3, r2                                       \n"
+    // Pass 3rd parameter as sp (stack pointer).
+    "  mov r2, sp                                       \n"
+    // Call the callback.
+    "  blx r3                                           \n"
+    // Discard all the registers.
+    "  add sp, sp, #36                                  \n"
+    // Pop lr into pc which returns and switches mode if needed.
+    "  pop {pc}                                         \n");