[riscv] Fix cctest/test-assembler-riscv*/RISCV_UTEST_FLOAT_WIDENING_vfwadd_vf.
Storing with E64 when SEW=32 has EMUL=2, which copies |n| 64 bit wide data to the result double array already. Besides, accessing v1 when EMUL=2 is reserved. R=yahan@iscas.ac.cn Change-Id: I0870d53c36b642529cab753409f52016d79219b8 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3878442 Commit-Queue: Yahan Lu <yahan@iscas.ac.cn> Reviewed-by:Yahan Lu <yahan@iscas.ac.cn> Cr-Commit-Position: refs/heads/main@{#83110}
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