MIPS: update missing write barrier for arguments store ICs, per comments.

Per review comments in http://codereview.chromium.org/7238020 after
issue was closed, we had used an un-necessary Add, which is removed here.
Thanks for the suggestion.

BUG=
TEST=

Review URL: http://codereview.chromium.org//7259010
Patch from Paul Lind <plind44@gmail.com>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@8425 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

src/mips/assembler-mips.h

@@ -329,6 +329,7 @@ class Operand BASE_EMBEDDED {
 class MemOperand : public Operand {
  public:
   explicit MemOperand(Register rn, int32_t offset = 0);
+  int32_t offset() const { return offset_; }
 
  private:
   int32_t offset_;

src/mips/ic-mips.cc

@@ -1006,8 +1006,9 @@ void KeyedStoreIC::GenerateNonStrictArguments(MacroAssembler* masm) {
   MemOperand mapped_location =
       GenerateMappedArgumentsLookup(masm, a2, a1, a3, t0, t1, &notin, &slow);
   __ sw(a0, mapped_location);
-  __ Addu(t2, a3, t1);
-  __ RecordWrite(a3, t2, t5);
+  // Verify mapped_location MemOperand is register, with no offset.
+  ASSERT_EQ(mapped_location.offset(), 0);
+  __ RecordWrite(a3, mapped_location.rm(), t5);
   __ Ret(USE_DELAY_SLOT);
   __ mov(v0, a0);  // (In delay slot) return the value stored in v0.
   __ bind(&notin);
@@ -1015,8 +1016,8 @@ void KeyedStoreIC::GenerateNonStrictArguments(MacroAssembler* masm) {
   MemOperand unmapped_location =
       GenerateUnmappedArgumentsLookup(masm, a1, a3, t0, &slow);
   __ sw(a0, unmapped_location);
-  __ Addu(t2, a3, t0);
-  __ RecordWrite(a3, t2, t5);
+  ASSERT_EQ(unmapped_location.offset(), 0);
+  __ RecordWrite(a3, unmapped_location.rm(), t5);
   __ Ret(USE_DELAY_SLOT);
   __ mov(v0, a0);  // (In delay slot) return the value stored in v0.
   __ bind(&slow);