[wasm-simd] Fix x64 F32x4 ReplaceLane

Change-Id: I94ae52c609c591d95ef0f71cba45e25ef80c9a77
Bug: v8:9008
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1529931Reviewed-by: Bill Budge <bbudge@chromium.org>
Commit-Queue: Deepti Gandluri <gdeepti@chromium.org>
Cr-Commit-Position: refs/heads/master@{#60342}

src/compiler/backend/x64/code-generator-x64.cc

@@ -2221,7 +2221,12 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       // The insertps instruction uses imm8[5:4] to indicate the lane
       // that needs to be replaced.
       byte select = i.InputInt8(1) << 4 & 0x30;
-      __ insertps(i.OutputSimd128Register(), i.InputDoubleRegister(2), select);
+      if (instr->InputAt(2)->IsFPRegister()) {
+        __ insertps(i.OutputSimd128Register(), i.InputDoubleRegister(2),
+                    select);
+      } else {
+        __ insertps(i.OutputSimd128Register(), i.InputOperand(2), select);
+      }
       break;
     }
     case kX64F32x4SConvertI32x4: {

src/x64/assembler-x64.cc

@@ -3244,6 +3244,19 @@ void Assembler::insertps(XMMRegister dst, XMMRegister src, byte imm8) {
   emit(imm8);
 }
 
+void Assembler::insertps(XMMRegister dst, Operand src, byte imm8) {
+  DCHECK(CpuFeatures::IsSupported(SSE4_1));
+  DCHECK(is_uint8(imm8));
+  EnsureSpace ensure_space(this);
+  emit(0x66);
+  emit_optional_rex_32(dst, src);
+  emit(0x0F);
+  emit(0x3A);
+  emit(0x21);
+  emit_sse_operand(dst, src);
+  emit(imm8);
+}
+
 void Assembler::movsd(Operand dst, XMMRegister src) {
   DCHECK(!IsEnabled(AVX));
   EnsureSpace ensure_space(this);

src/x64/assembler-x64.h

@@ -1070,6 +1070,7 @@ class V8_EXPORT_PRIVATE Assembler : public AssemblerBase {
 
   // SSE 4.1 instruction
   void insertps(XMMRegister dst, XMMRegister src, byte imm8);
+  void insertps(XMMRegister dst, Operand src, byte imm8);
   void extractps(Register dst, XMMRegister src, byte imm8);
   void pextrb(Register dst, XMMRegister src, int8_t imm8);
   void pextrb(Operand dst, XMMRegister src, int8_t imm8);