[wasm-simd][liftoff][arm][arm64] Implement remaining splats

Implement f64x2, i64x2, i8x16 splats on arm and arm64.

Bug: v8:9909
Change-Id: I41f635ae5c6f025ece7f6445a58fbad1ad678fbd
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2087694Reviewed-by: Clemens Backes <clemensb@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#66616}

src/wasm/baseline/arm/liftoff-assembler-arm.h

@@ -1555,7 +1555,8 @@ void LiftoffAssembler::emit_f64_set_cond(Condition cond, Register dst,
 
 void LiftoffAssembler::emit_f64x2_splat(LiftoffRegister dst,
                                         LiftoffRegister src) {
-  bailout(kSimd, "f64x2splat");
+  TurboAssembler::Move(dst.low_fp(), src.fp());
+  TurboAssembler::Move(dst.high_fp(), src.fp());
 }
 
 void LiftoffAssembler::emit_f32x4_splat(LiftoffRegister dst,
@@ -1570,7 +1571,10 @@ void LiftoffAssembler::emit_f32x4_add(LiftoffRegister dst, LiftoffRegister lhs,
 
 void LiftoffAssembler::emit_i64x2_splat(LiftoffRegister dst,
                                         LiftoffRegister src) {
-  bailout(kSimd, "i64x2splat");
+  Simd128Register dst_simd = liftoff::GetSimd128Register(dst.low_fp());
+  vdup(Neon32, dst_simd, src.low_gp());
+  ReplaceLane(dst_simd, dst_simd, src.high_gp(), NeonS32, 1);
+  ReplaceLane(dst_simd, dst_simd, src.high_gp(), NeonS32, 3);
 }
 
 void LiftoffAssembler::emit_i32x4_splat(LiftoffRegister dst,
@@ -1595,7 +1599,7 @@ void LiftoffAssembler::emit_i16x8_add(LiftoffRegister dst, LiftoffRegister lhs,
 
 void LiftoffAssembler::emit_i8x16_splat(LiftoffRegister dst,
                                         LiftoffRegister src) {
-  bailout(kSimd, "i8x16splat");
+  vdup(Neon8, liftoff::GetSimd128Register(dst.low_fp()), src.gp());
 }
 
 void LiftoffAssembler::StackCheck(Label* ool_code, Register limit_address) {

src/wasm/baseline/arm64/liftoff-assembler-arm64.h

@@ -1086,7 +1086,7 @@ void LiftoffAssembler::emit_f64_set_cond(Condition cond, Register dst,
 
 void LiftoffAssembler::emit_f64x2_splat(LiftoffRegister dst,
                                         LiftoffRegister src) {
-  bailout(kSimd, "f64x2splat");
+  Dup(dst.fp().V2D(), src.fp().D(), 0);
 }
 
 void LiftoffAssembler::emit_f32x4_splat(LiftoffRegister dst,
@@ -1101,7 +1101,7 @@ void LiftoffAssembler::emit_f32x4_add(LiftoffRegister dst, LiftoffRegister lhs,
 
 void LiftoffAssembler::emit_i64x2_splat(LiftoffRegister dst,
                                         LiftoffRegister src) {
-  bailout(kSimd, "i64x2splat");
+  Dup(dst.fp().V2D(), src.gp().X());
 }
 
 void LiftoffAssembler::emit_i32x4_splat(LiftoffRegister dst,
@@ -1126,7 +1126,7 @@ void LiftoffAssembler::emit_i16x8_add(LiftoffRegister dst, LiftoffRegister lhs,
 
 void LiftoffAssembler::emit_i8x16_splat(LiftoffRegister dst,
                                         LiftoffRegister src) {
-  bailout(kSimd, "i8x16splat");
+  Dup(dst.fp().V16B(), src.gp().W());
 }
 
 void LiftoffAssembler::StackCheck(Label* ool_code, Register limit_address) {