Commit 12c47bb0 authored by Milad Fa's avatar Milad Fa Committed by Commit Bot

PPC [simd]: fix ExtAddPairwise on PPC

We will need to use both the vector multiply even
and odd instructions.

Change-Id: I1af3517dc3359d395682e3d661068b429edba8f1
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2785427Reviewed-by: 's avatarJunliang Yan <junyan@redhat.com>
Commit-Queue: Milad Fa <mfarazma@redhat.com>
Cr-Commit-Position: refs/heads/master@{#73662}
parent 20a44ed4
...@@ -3658,7 +3658,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( ...@@ -3658,7 +3658,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
__ li(kScratchReg, Operand(1)); __ li(kScratchReg, Operand(1));
__ mtvsrd(kScratchSimd128Reg, kScratchReg); __ mtvsrd(kScratchSimd128Reg, kScratchReg);
__ vsplth(kScratchSimd128Reg, kScratchSimd128Reg, Operand(3)); __ vsplth(kScratchSimd128Reg, kScratchSimd128Reg, Operand(3));
EXT_ADD_PAIRWISE(vmulesh, vmulesh, vadduwm) EXT_ADD_PAIRWISE(vmulesh, vmulosh, vadduwm)
break; break;
} }
case kPPC_I32x4ExtAddPairwiseI16x8U: { case kPPC_I32x4ExtAddPairwiseI16x8U: {
...@@ -3668,7 +3668,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( ...@@ -3668,7 +3668,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
__ li(kScratchReg, Operand(1)); __ li(kScratchReg, Operand(1));
__ mtvsrd(kScratchSimd128Reg, kScratchReg); __ mtvsrd(kScratchSimd128Reg, kScratchReg);
__ vsplth(kScratchSimd128Reg, kScratchSimd128Reg, Operand(3)); __ vsplth(kScratchSimd128Reg, kScratchSimd128Reg, Operand(3));
EXT_ADD_PAIRWISE(vmuleuh, vmuleuh, vadduwm) EXT_ADD_PAIRWISE(vmuleuh, vmulouh, vadduwm)
break; break;
} }
...@@ -3677,7 +3677,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( ...@@ -3677,7 +3677,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
Simd128Register dst = i.OutputSimd128Register(); Simd128Register dst = i.OutputSimd128Register();
Simd128Register tempFPReg1 = i.ToSimd128Register(instr->TempAt(0)); Simd128Register tempFPReg1 = i.ToSimd128Register(instr->TempAt(0));
__ xxspltib(kScratchSimd128Reg, Operand(1)); __ xxspltib(kScratchSimd128Reg, Operand(1));
EXT_ADD_PAIRWISE(vmulesb, vmulesb, vadduhm) EXT_ADD_PAIRWISE(vmulesb, vmulosb, vadduhm)
break; break;
} }
case kPPC_I16x8ExtAddPairwiseI8x16U: { case kPPC_I16x8ExtAddPairwiseI8x16U: {
...@@ -3685,7 +3685,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( ...@@ -3685,7 +3685,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
Simd128Register dst = i.OutputSimd128Register(); Simd128Register dst = i.OutputSimd128Register();
Simd128Register tempFPReg1 = i.ToSimd128Register(instr->TempAt(0)); Simd128Register tempFPReg1 = i.ToSimd128Register(instr->TempAt(0));
__ xxspltib(kScratchSimd128Reg, Operand(1)); __ xxspltib(kScratchSimd128Reg, Operand(1));
EXT_ADD_PAIRWISE(vmuleub, vmuleub, vadduhm) EXT_ADD_PAIRWISE(vmuleub, vmuloub, vadduhm)
break; break;
} }
#undef EXT_ADD_PAIRWISE #undef EXT_ADD_PAIRWISE
......
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