Commit 10cf6aeb authored by Thibaud Michaud's avatar Thibaud Michaud Committed by Commit Bot

[liftoff] Add early stop in PrepareCall spill loop

We already track register usage, so we can stop as soon as all registers
are spilled. Also iterate the stack backwards, since the bottom of the
stack is more likely to be already spilled.

R=clemensb@chromium.org

Bug: v8:10576
Change-Id: I06fe8efe257dd5b8bcb426b4e79a8815a8cb5c81
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2228494
Commit-Queue: Thibaud Michaud <thibaudm@chromium.org>
Reviewed-by: 's avatarClemens Backes <clemensb@chromium.org>
Cr-Commit-Position: refs/heads/master@{#68151}
parent ab671ee8
......@@ -757,13 +757,14 @@ void LiftoffAssembler::PrepareCall(const FunctionSig* sig,
constexpr size_t kInputShift = 1;
// Spill all cache slots which are not being used as parameters.
// Don't update any register use counters, they will be reset later anyway.
for (uint32_t idx = 0, end = cache_state_.stack_height() - num_params;
idx < end; ++idx) {
VarState& slot = cache_state_.stack_state[idx];
if (!slot.is_reg()) continue;
Spill(slot.offset(), slot.reg(), slot.type());
slot.MakeStack();
for (VarState* it = cache_state_.stack_state.end() - 1 - num_params;
it >= cache_state_.stack_state.begin() &&
!cache_state_.used_registers.is_empty();
--it) {
if (!it->is_reg()) continue;
Spill(it->offset(), it->reg(), it->type());
cache_state_.dec_used(it->reg());
it->MakeStack();
}
LiftoffStackSlots stack_slots(this);
......
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