Commit 10aa4c58 authored by Liu Yu's avatar Liu Yu Committed by V8 LUCI CQ

[mips32][liftoff] Fix a doubleword load operation

If dst.low_gp and src_op_upper.rm are the same register,
then the first Ulw destroys src_op_upper.rm and the second Ulw
reads the memory from bad address.

Change-Id: I5e385296c9a95707ad2416124a2595af29176a61
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3252869Reviewed-by: 's avatarZhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Commit-Queue: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Auto-Submit: Liu yu <liuyu@loongson.cn>
Cr-Commit-Position: refs/heads/main@{#77604}
parent 67e863c8
......@@ -617,8 +617,14 @@ void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr,
(offset_reg != no_reg)
? MemOperand(src, offset_imm + liftoff::kHighWordOffset)
: MemOperand(src_addr, offset_imm + liftoff::kHighWordOffset);
TurboAssembler::Ulw(dst.low_gp(), src_op);
TurboAssembler::Ulw(dst.high_gp(), src_op_upper);
{
UseScratchRegisterScope temps(this);
Register temp = dst.low_gp();
if (dst.low_gp() == src_op_upper.rm()) temp = temps.Acquire();
TurboAssembler::Ulw(temp, src_op);
TurboAssembler::Ulw(dst.high_gp(), src_op_upper);
if (dst.low_gp() == src_op_upper.rm()) mov(dst.low_gp(), temp);
}
break;
}
case LoadType::kF32Load:
......
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