Commit 10587a27 authored by Ng Zhi An's avatar Ng Zhi An Committed by Commit Bot

[wasm-simd] Enable SIMD by default

Bug: v8:11511,v8:6020
Change-Id: I07b87b2a3a2ea08def9be2d0da808c013dd6fc2a
Cq-Include-Trybots: luci.v8.try:v8_linux_blink_rel
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2728245
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Reviewed-by: 's avatarDeepti Gandluri <gdeepti@chromium.org>
Cr-Commit-Position: refs/heads/master@{#73237}
parent 15f5679e
......@@ -334,13 +334,6 @@ void CheckBailoutAllowed(LiftoffBailoutReason reason, const char* detail,
// https://v8.dev/docs/wasm-shipping-checklist. Some are not though. They are
// listed here explicitly, with a bug assigned to each of them.
// TODO(6020): Fully implement SIMD in Liftoff.
STATIC_ASSERT(kStagedFeatures.has_simd());
if (reason == kSimd) {
DCHECK(env->enabled_features.has_simd());
return;
}
// TODO(7581): Fully implement reftypes in Liftoff.
STATIC_ASSERT(kStagedFeatures.has_reftypes());
if (reason == kRefTypes) {
......
......@@ -57,12 +57,6 @@
/* Staged in v8.7 * */ \
V(return_call, "return call opcodes", false) \
\
/* Fixed-width SIMD operations. */ \
/* https://github.com/webassembly/simd */ \
/* V8 side owner: gdeepti, zhin */ \
/* Staged in v8.7 * */ \
V(simd, "SIMD opcodes", false) \
\
/* Threads proposal. */ \
/* https://github.com/webassembly/threads */ \
/* NOTE: This is enabled via chromium flag on desktop systems since v7.4 */ \
......@@ -86,7 +80,14 @@
/* V8 side owner: thibaudm */ \
/* Shipped in v8.6. */ \
/* ITS: https://groups.google.com/g/v8-users/c/pv2E4yFWeF0 */ \
V(mv, "multi-value support", true)
V(mv, "multi-value support", true) \
\
/* Fixed-width SIMD operations. */ \
/* https://github.com/webassembly/simd */ \
/* V8 side owner: gdeepti, zhin */ \
/* Staged in v8.7 * */ \
/* Shipped in v9.1 * */ \
V(simd, "SIMD opcodes", true)
// Combination of all available wasm feature flags.
#define FOREACH_WASM_FEATURE_FLAG(V) \
......
......@@ -368,6 +368,26 @@ bool ExpectFused(TestExecutionTier tier) {
void RunWasm_##name##_Impl(LowerSimd lower_simd, \
TestExecutionTier execution_tier)
// Use this for post-mvp instructions, for which we only implement interpreter
// and TurboFan support. Liftoff support is generally not implemented yet, so
// don't test that, and neither is scalar lowering.
#define WASM_SIMD_TEST_POST_MVP(name) \
void RunWasm_##name##_Impl(LowerSimd lower_simd, \
TestExecutionTier execution_tier); \
TEST(RunWasm_##name##_turbofan) { \
if (!CpuFeatures::SupportsWasmSimd128()) return; \
EXPERIMENTAL_FLAG_SCOPE(simd); \
FLAG_SCOPE(wasm_simd_post_mvp); \
RunWasm_##name##_Impl(kNoLowerSimd, TestExecutionTier::kTurbofan); \
} \
TEST(RunWasm_##name##_interpreter) { \
EXPERIMENTAL_FLAG_SCOPE(simd); \
FLAG_SCOPE(wasm_simd_post_mvp); \
RunWasm_##name##_Impl(kNoLowerSimd, TestExecutionTier::kInterpreter); \
} \
void RunWasm_##name##_Impl(LowerSimd lower_simd, \
TestExecutionTier execution_tier)
// Returns true if the platform can represent the result.
template <typename T>
bool PlatformCanRepresent(T x) {
......@@ -607,14 +627,12 @@ WASM_SIMD_TEST(F32x4Sqrt) {
RunF32x4UnOpTest(execution_tier, lower_simd, kExprF32x4Sqrt, std::sqrt);
}
WASM_SIMD_TEST(F32x4RecipApprox) {
FLAG_SCOPE(wasm_simd_post_mvp);
WASM_SIMD_TEST_POST_MVP(F32x4RecipApprox) {
RunF32x4UnOpTest(execution_tier, lower_simd, kExprF32x4RecipApprox,
base::Recip, false /* !exact */);
}
WASM_SIMD_TEST(F32x4RecipSqrtApprox) {
FLAG_SCOPE(wasm_simd_post_mvp);
WASM_SIMD_TEST_POST_MVP(F32x4RecipSqrtApprox) {
RunF32x4UnOpTest(execution_tier, lower_simd, kExprF32x4RecipSqrtApprox,
base::RecipSqrt, false /* !exact */);
}
......@@ -767,8 +785,7 @@ WASM_SIMD_TEST(F32x4Le) {
}
#if V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_S390X
WASM_SIMD_TEST_NO_LOWERING(F32x4Qfma) {
FLAG_SCOPE(wasm_simd_post_mvp);
WASM_SIMD_TEST_POST_MVP(F32x4Qfma) {
WasmRunner<int32_t, float, float, float> r(execution_tier, lower_simd);
// Set up global to hold mask output.
float* g = r.builder().AddGlobal<float>(kWasmS128);
......@@ -792,8 +809,7 @@ WASM_SIMD_TEST_NO_LOWERING(F32x4Qfma) {
}
}
WASM_SIMD_TEST_NO_LOWERING(F32x4Qfms) {
FLAG_SCOPE(wasm_simd_post_mvp);
WASM_SIMD_TEST_POST_MVP(F32x4Qfms) {
WasmRunner<int32_t, float, float, float> r(execution_tier, lower_simd);
// Set up global to hold mask output.
float* g = r.builder().AddGlobal<float>(kWasmS128);
......@@ -1493,8 +1509,7 @@ WASM_SIMD_TEST(I64x2Mul) {
}
#if V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_S390X
WASM_SIMD_TEST_NO_LOWERING(F64x2Qfma) {
FLAG_SCOPE(wasm_simd_post_mvp);
WASM_SIMD_TEST_POST_MVP(F64x2Qfma) {
WasmRunner<int32_t, double, double, double> r(execution_tier, lower_simd);
// Set up global to hold mask output.
double* g = r.builder().AddGlobal<double>(kWasmS128);
......@@ -1518,8 +1533,7 @@ WASM_SIMD_TEST_NO_LOWERING(F64x2Qfma) {
}
}
WASM_SIMD_TEST_NO_LOWERING(F64x2Qfms) {
FLAG_SCOPE(wasm_simd_post_mvp);
WASM_SIMD_TEST_POST_MVP(F64x2Qfms) {
WasmRunner<int32_t, double, double, double> r(execution_tier, lower_simd);
// Set up global to hold mask output.
double* g = r.builder().AddGlobal<double>(kWasmS128);
......@@ -3615,9 +3629,7 @@ WASM_SIMD_TEST(SimdF32x4SetGlobal) {
#if V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_IA32
// TODO(v8:11168): Prototyping prefetch.
WASM_SIMD_TEST(SimdPrefetch) {
FLAG_SCOPE(wasm_simd_post_mvp);
WASM_SIMD_TEST_POST_MVP(SimdPrefetch) {
{
// Test PrefetchT.
WasmRunner<int32_t> r(execution_tier, lower_simd);
......
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