[turboshaft] restructure MachineRepresentation and MachineType

Bug: v8:12783
Change-Id: I5de98493d67c7c797d4a1b2dcd18c0347821f0f8
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3870471Reviewed-by: Nico Hartmann <nicohartmann@chromium.org>
Commit-Queue: Tobias Tebbi <tebbi@chromium.org>
Auto-Submit: Tobias Tebbi <tebbi@chromium.org>
Cr-Commit-Position: refs/heads/main@{#83262}

BUILD.bazel

@@ -2878,6 +2878,8 @@ filegroup(
         "src/compiler/turboshaft/optimization-phase.h",
         "src/compiler/turboshaft/recreate-schedule.cc",
         "src/compiler/turboshaft/recreate-schedule.h",
+        "src/compiler/turboshaft/representations.cc",
+        "src/compiler/turboshaft/representations.h",
         "src/compiler/turboshaft/sidetable.h",
         "src/compiler/turboshaft/utils.h",
         "src/compiler/turboshaft/value-numbering-assembler.h",

BUILD.gn

@@ -2933,6 +2933,7 @@ v8_header_set("v8_internal_headers") {
     "src/compiler/turboshaft/operations.h",
     "src/compiler/turboshaft/optimization-phase.h",
     "src/compiler/turboshaft/recreate-schedule.h",
+    "src/compiler/turboshaft/representations.h",
     "src/compiler/turboshaft/sidetable.h",
     "src/compiler/turboshaft/utils.h",
     "src/compiler/turboshaft/value-numbering-assembler.h",
@@ -4229,6 +4230,7 @@ v8_source_set("v8_turboshaft") {
     "src/compiler/turboshaft/operations.cc",
     "src/compiler/turboshaft/optimization-phase.cc",
     "src/compiler/turboshaft/recreate-schedule.cc",
+    "src/compiler/turboshaft/representations.cc",
   ]
 
   public_deps = [

src/codegen/machine-type.h

@@ -152,10 +152,6 @@ class MachineType {
   constexpr bool IsCompressedPointer() const {
     return representation() == MachineRepresentation::kCompressedPointer;
   }
-  constexpr static MachineRepresentation TaggedRepresentation() {
-    return (kTaggedSize == 4) ? MachineRepresentation::kWord32
-                              : MachineRepresentation::kWord64;
-  }
   constexpr static MachineRepresentation PointerRepresentation() {
     return (kSystemPointerSize == 4) ? MachineRepresentation::kWord32
                                      : MachineRepresentation::kWord64;

src/compiler/turboshaft/decompression-optimization.cc

@@ -77,21 +77,22 @@ void DecompressionAnalyzer::ProcessOperation(const Operation& op) {
     case Opcode::kStore: {
       auto& store = op.Cast<StoreOp>();
       MarkAsNeedsDecompression(store.base());
-      if (!IsAnyTagged(store.stored_rep))
+      if (!store.stored_rep.IsTagged()) {
         MarkAsNeedsDecompression(store.value());
+      }
       break;
     }
     case Opcode::kIndexedStore: {
       auto& store = op.Cast<IndexedStoreOp>();
       MarkAsNeedsDecompression(store.base());
       MarkAsNeedsDecompression(store.index());
-      if (!IsAnyTagged(store.stored_rep))
+      if (!store.stored_rep.IsTagged()) {
         MarkAsNeedsDecompression(store.value());
+      }
       break;
     }
     case Opcode::kFrameState:
-      // The deopt code knows how to handle Compressed inputs, both
-      // MachineRepresentation kCompressed values and CompressedHeapConstants.
+      // The deopt code knows how to handle compressed inputs.
       break;
     case Opcode::kPhi: {
       // Replicate the phi's state for its inputs.
@@ -107,7 +108,7 @@ void DecompressionAnalyzer::ProcessOperation(const Operation& op) {
     }
     case Opcode::kEqual: {
       auto& equal = op.Cast<EqualOp>();
-      if (equal.rep == MachineRepresentation::kWord64) {
+      if (equal.rep == WordRepresentation::Word64()) {
         MarkAsNeedsDecompression(equal.left());
         MarkAsNeedsDecompression(equal.right());
       }
@@ -115,7 +116,7 @@ void DecompressionAnalyzer::ProcessOperation(const Operation& op) {
     }
     case Opcode::kComparison: {
       auto& comp = op.Cast<ComparisonOp>();
-      if (comp.rep == MachineRepresentation::kWord64) {
+      if (comp.rep == WordRepresentation::Word64()) {
         MarkAsNeedsDecompression(comp.left());
         MarkAsNeedsDecompression(comp.right());
       }
@@ -123,7 +124,7 @@ void DecompressionAnalyzer::ProcessOperation(const Operation& op) {
     }
     case Opcode::kWordBinop: {
       auto& binary_op = op.Cast<WordBinopOp>();
-      if (binary_op.rep == MachineRepresentation::kWord64) {
+      if (binary_op.rep == WordRepresentation::Word64()) {
         MarkAsNeedsDecompression(binary_op.left());
         MarkAsNeedsDecompression(binary_op.right());
       }
@@ -131,15 +132,14 @@ void DecompressionAnalyzer::ProcessOperation(const Operation& op) {
     }
     case Opcode::kShift: {
       auto& shift_op = op.Cast<ShiftOp>();
-      if (shift_op.rep == MachineRepresentation::kWord64) {
+      if (shift_op.rep == WordRepresentation::Word64()) {
         MarkAsNeedsDecompression(shift_op.left());
       }
       break;
     }
     case Opcode::kChange: {
       auto& change = op.Cast<ChangeOp>();
-      if (change.to == MachineRepresentation::kWord64 &&
-          NeedsDecompression(op)) {
+      if (change.to == WordRepresentation::Word64() && NeedsDecompression(op)) {
         MarkAsNeedsDecompression(change.input());
       }
       break;
@@ -187,28 +187,28 @@ void RunDecompressionOptimization(Graph& graph, Zone* phase_zone) {
       }
       case Opcode::kPhi: {
         auto& phi = op.Cast<PhiOp>();
-        if (phi.rep == MachineRepresentation::kTagged) {
-          phi.rep = MachineRepresentation::kCompressed;
-        } else if (phi.rep == MachineRepresentation::kTaggedPointer) {
-          phi.rep = MachineRepresentation::kCompressedPointer;
+        if (phi.rep == RegisterRepresentation::Tagged()) {
+          phi.rep = RegisterRepresentation::Tagged();
         }
         break;
       }
       case Opcode::kLoad: {
         auto& load = op.Cast<LoadOp>();
-        if (load.loaded_rep == MachineType::AnyTagged()) {
-          load.loaded_rep = MachineType::AnyCompressed();
-        } else if (load.loaded_rep == MachineType::TaggedPointer()) {
-          load.loaded_rep = MachineType::CompressedPointer();
+        if (load.loaded_rep.IsTagged()) {
+          DCHECK_EQ(load.result_rep,
+                    any_of(RegisterRepresentation::Tagged(),
+                           RegisterRepresentation::Compressed()));
+          load.result_rep = RegisterRepresentation::Compressed();
         }
         break;
       }
       case Opcode::kIndexedLoad: {
         auto& load = op.Cast<IndexedLoadOp>();
-        if (load.loaded_rep == MachineType::AnyTagged()) {
-          load.loaded_rep = MachineType::AnyCompressed();
-        } else if (load.loaded_rep == MachineType::TaggedPointer()) {
-          load.loaded_rep = MachineType::CompressedPointer();
+        if (load.loaded_rep.IsTagged()) {
+          DCHECK_EQ(load.result_rep,
+                    any_of(RegisterRepresentation::Tagged(),
+                           RegisterRepresentation::Compressed()));
+          load.result_rep = RegisterRepresentation::Compressed();
         }
         break;
       }

src/compiler/turboshaft/graph-builder.cc

@@ -287,7 +287,9 @@ OpIndex GraphBuilder::Process(
 
     case IrOpcode::kPhi: {
       int input_count = op->ValueInputCount();
-      MachineRepresentation rep = PhiRepresentationOf(op);
+      RegisterRepresentation rep =
+          RegisterRepresentation::FromMachineRepresentation(
+              PhiRepresentationOf(op));
       if (assembler.current_block()->IsLoop()) {
         DCHECK_EQ(input_count, 2);
         return assembler.PendingLoopPhi(Map(node->InputAt(0)), rep,
@@ -405,9 +407,9 @@ OpIndex GraphBuilder::Process(
 
     case IrOpcode::kWord64Sar:
     case IrOpcode::kWord32Sar: {
-      MachineRepresentation rep = opcode == IrOpcode::kWord64Sar
-                                      ? MachineRepresentation::kWord64
-                                      : MachineRepresentation::kWord32;
+      WordRepresentation rep = opcode == IrOpcode::kWord64Sar
+                                   ? WordRepresentation::Word64()
+                                   : WordRepresentation::Word32();
       ShiftOp::Kind kind;
       switch (ShiftKindOf(op)) {
         case ShiftKind::kShiftOutZeros:
@@ -463,8 +465,8 @@ OpIndex GraphBuilder::Process(
 #define CHANGE_CASE(opcode, kind, from, to)                                 \
   case IrOpcode::k##opcode:                                                 \
     return assembler.Change(Map(node->InputAt(0)), ChangeOp::Kind::k##kind, \
-                            MachineRepresentation::k##from,                 \
-                            MachineRepresentation::k##to);
+                            RegisterRepresentation::from(),                 \
+                            RegisterRepresentation::to());
 
       CHANGE_CASE(BitcastWord32ToWord64, Bitcast, Word32, Word64)
       CHANGE_CASE(BitcastFloat32ToInt32, Bitcast, Float32, Word32)
@@ -501,8 +503,8 @@ OpIndex GraphBuilder::Process(
           break;
       }
       return assembler.Change(Map(node->InputAt(0)), kind,
-                              MachineRepresentation::kFloat64,
-                              MachineRepresentation::kWord64);
+                              RegisterRepresentation::Float64(),
+                              RegisterRepresentation::Word64());
     }
 
     case IrOpcode::kFloat64InsertLowWord32:
@@ -516,16 +518,18 @@ OpIndex GraphBuilder::Process(
 
     case IrOpcode::kBitcastTaggedToWord:
       return assembler.TaggedBitcast(Map(node->InputAt(0)),
-                                     MachineRepresentation::kTagged,
-                                     MachineType::PointerRepresentation());
+                                     RegisterRepresentation::Tagged(),
+                                     RegisterRepresentation::PointerSized());
     case IrOpcode::kBitcastWordToTagged:
       return assembler.TaggedBitcast(Map(node->InputAt(0)),
-                                     MachineType::PointerRepresentation(),
-                                     MachineRepresentation::kTagged);
+                                     RegisterRepresentation::PointerSized(),
+                                     RegisterRepresentation::Tagged());
 
     case IrOpcode::kLoad:
     case IrOpcode::kUnalignedLoad: {
-      MachineType loaded_rep = LoadRepresentationOf(op);
+      MemoryRepresentation loaded_rep =
+          MemoryRepresentation::FromMachineType(LoadRepresentationOf(op));
+      RegisterRepresentation result_rep = loaded_rep.ToRegisterRepresentation();
       Node* base = node->InputAt(0);
       Node* index = node->InputAt(1);
       LoadOp::Kind kind = opcode == IrOpcode::kLoad
@@ -533,19 +537,19 @@ OpIndex GraphBuilder::Process(
                               : LoadOp::Kind::kRawUnaligned;
       if (index->opcode() == IrOpcode::kInt32Constant) {
         int32_t offset = OpParameter<int32_t>(index->op());
-        return assembler.Load(Map(base), kind, loaded_rep, offset);
+        return assembler.Load(Map(base), kind, loaded_rep, result_rep, offset);
       }
       if (index->opcode() == IrOpcode::kInt64Constant) {
         int64_t offset = OpParameter<int64_t>(index->op());
         if (base::IsValueInRangeForNumericType<int32_t>(offset)) {
-          return assembler.Load(Map(base), kind, loaded_rep,
+          return assembler.Load(Map(base), kind, loaded_rep, result_rep,
                                 static_cast<int32_t>(offset));
         }
       }
       int32_t offset = 0;
       uint8_t element_size_log2 = 0;
       return assembler.IndexedLoad(Map(base), Map(index), kind, loaded_rep,
-                                   offset, element_size_log2);
+                                   result_rep, offset, element_size_log2);
     }
 
     case IrOpcode::kStore:
@@ -563,21 +567,26 @@ OpIndex GraphBuilder::Process(
       if (index->opcode() == IrOpcode::kInt32Constant) {
         int32_t offset = OpParameter<int32_t>(index->op());
         return assembler.Store(Map(base), Map(value), kind,
-                               store_rep.representation(),
+                               MemoryRepresentation::FromMachineRepresentation(
+                                   store_rep.representation()),
                                store_rep.write_barrier_kind(), offset);
       }
       if (index->opcode() == IrOpcode::kInt64Constant) {
         int64_t offset = OpParameter<int64_t>(index->op());
         if (base::IsValueInRangeForNumericType<int32_t>(offset)) {
           return assembler.Store(
-              Map(base), Map(value), kind, store_rep.representation(),
+              Map(base), Map(value), kind,
+              MemoryRepresentation::FromMachineRepresentation(
+                  store_rep.representation()),
               store_rep.write_barrier_kind(), static_cast<int32_t>(offset));
         }
       }
       int32_t offset = 0;
       uint8_t element_size_log2 = 0;
       return assembler.IndexedStore(
-          Map(base), Map(index), Map(value), kind, store_rep.representation(),
+          Map(base), Map(index), Map(value), kind,
+          MemoryRepresentation::FromMachineRepresentation(
+              store_rep.representation()),
           store_rep.write_barrier_kind(), offset, element_size_log2);
     }
 

src/compiler/turboshaft/operations.cc

@@ -100,26 +100,34 @@ std::ostream& operator<<(std::ostream& os, FloatUnaryOp::Kind kind) {
 }
 
 // static
-bool FloatUnaryOp::IsSupported(Kind kind, MachineRepresentation rep) {
-  switch (kind) {
-    case Kind::kRoundDown:
-      return rep == MachineRepresentation::kFloat32
-                 ? SupportedOperations::float32_round_down()
-                 : SupportedOperations::float64_round_down();
-    case Kind::kRoundUp:
-      return rep == MachineRepresentation::kFloat32
-                 ? SupportedOperations::float32_round_up()
-                 : SupportedOperations::float64_round_up();
-    case Kind::kRoundToZero:
-      return rep == MachineRepresentation::kFloat32
-                 ? SupportedOperations::float32_round_to_zero()
-                 : SupportedOperations::float64_round_to_zero();
-    case Kind::kRoundTiesEven:
-      return rep == MachineRepresentation::kFloat32
-                 ? SupportedOperations::float32_round_ties_even()
-                 : SupportedOperations::float64_round_ties_even();
-    default:
-      return true;
+bool FloatUnaryOp::IsSupported(Kind kind, FloatRepresentation rep) {
+  switch (rep) {
+    case FloatRepresentation::Float32():
+      switch (kind) {
+        case Kind::kRoundDown:
+          return SupportedOperations::float32_round_down();
+        case Kind::kRoundUp:
+          return SupportedOperations::float32_round_up();
+        case Kind::kRoundToZero:
+          return SupportedOperations::float32_round_to_zero();
+        case Kind::kRoundTiesEven:
+          return SupportedOperations::float32_round_ties_even();
+        default:
+          return true;
+      }
+    case FloatRepresentation::Float64():
+      switch (kind) {
+        case Kind::kRoundDown:
+          return SupportedOperations::float64_round_down();
+        case Kind::kRoundUp:
+          return SupportedOperations::float64_round_up();
+        case Kind::kRoundToZero:
+          return SupportedOperations::float64_round_to_zero();
+        case Kind::kRoundTiesEven:
+          return SupportedOperations::float64_round_ties_even();
+        default:
+          return true;
+      }
   }
 }
 

src/compiler/turboshaft/optimization-phase.h

@@ -445,12 +445,12 @@ struct OptimizationPhase<Analyzer, Assembler>::Impl {
   }
   OpIndex ReduceLoad(const LoadOp& op) {
     return assembler.Load(MapToNewGraph(op.base()), op.kind, op.loaded_rep,
-                          op.offset);
+                          op.result_rep, op.offset);
   }
   OpIndex ReduceIndexedLoad(const IndexedLoadOp& op) {
     return assembler.IndexedLoad(
         MapToNewGraph(op.base()), MapToNewGraph(op.index()), op.kind,
-        op.loaded_rep, op.offset, op.element_size_log2);
+        op.loaded_rep, op.result_rep, op.offset, op.element_size_log2);
   }
   OpIndex ReduceStore(const StoreOp& op) {
     return assembler.Store(MapToNewGraph(op.base()), MapToNewGraph(op.value()),

src/compiler/turboshaft/representations.cc

+// Copyright 2022 the V8 project authors. All rights reserved.
+// Use of this source code is governed by a BSD-style license that can be
+// found in the LICENSE file.
+
+#include "src/compiler/turboshaft/representations.h"
+
+namespace v8::internal::compiler::turboshaft {
+
+std::ostream& operator<<(std::ostream& os, RegisterRepresentation rep) {
+  switch (rep) {
+    case RegisterRepresentation::Word32():
+      return os << "Word32";
+    case RegisterRepresentation::Word64():
+      return os << "Word64";
+    case RegisterRepresentation::Float32():
+      return os << "Float32";
+    case RegisterRepresentation::Float64():
+      return os << "Float64";
+    case RegisterRepresentation::Tagged():
+      return os << "Tagged";
+    case RegisterRepresentation::Compressed():
+      return os << "Compressed";
+  }
+}
+
+std::ostream& operator<<(std::ostream& os, MemoryRepresentation rep) {
+  switch (rep) {
+    case MemoryRepresentation::Int8():
+      return os << "Int8";
+    case MemoryRepresentation::Uint8():
+      return os << "Uint8";
+    case MemoryRepresentation::Int16():
+      return os << "Int16";
+    case MemoryRepresentation::Uint16():
+      return os << "Uint16";
+    case MemoryRepresentation::Int32():
+      return os << "Int32";
+    case MemoryRepresentation::Uint32():
+      return os << "Uint32";
+    case MemoryRepresentation::Int64():
+      return os << "Int64";
+    case MemoryRepresentation::Uint64():
+      return os << "Uint64";
+    case MemoryRepresentation::Float32():
+      return os << "Float32";
+    case MemoryRepresentation::Float64():
+      return os << "Float64";
+    case MemoryRepresentation::AnyTagged():
+      return os << "AnyTagged";
+    case MemoryRepresentation::TaggedPointer():
+      return os << "TaggedPointer";
+    case MemoryRepresentation::TaggedSigned():
+      return os << "TaggedSigned";
+    case MemoryRepresentation::SandboxedPointer():
+      return os << "SandboxedPointer";
+  }
+}
+
+}  // namespace v8::internal::compiler::turboshaft

src/compiler/turboshaft/utils.h

@@ -86,6 +86,11 @@ std::ostream& operator<<(std::ostream& os, all_of<Ts...> all) {
   return all.PrintTo(os, std::index_sequence_for<Ts...>{});
 }
 
+class Uninstantiable {
+ private:
+  constexpr Uninstantiable() = default;
+};
+
 }  // namespace v8::internal::compiler::turboshaft
 
 #endif  // V8_COMPILER_TURBOSHAFT_UTILS_H_