[wasm] Add Remaining I64Atomic operations for ARM64

 - Add Implementation for I64Atomic{Load, Store, Exchange,
CompareExchange} for supported MemTypes/Representations
 - Refactoring to simplify instruction selection
 - Enable tests for ARM64

Bug: v8:6532
Change-Id: I4c4a65fd3bbdc6955eda29d7e08d6eef29c55628
Reviewed-on: https://chromium-review.googlesource.com/1003225Reviewed-by: Martyn Capewell <martyn.capewell@arm.com>
Reviewed-by: Bill Budge <bbudge@chromium.org>
Reviewed-by: Ben Smith <binji@chromium.org>
Commit-Queue: Deepti Gandluri <gdeepti@chromium.org>
Cr-Commit-Position: refs/heads/master@{#52598}

src/compiler/arm64/instruction-codes-arm64.h

@@ -301,6 +301,14 @@ namespace compiler {
   V(Arm64S1x8AllTrue)                       \
   V(Arm64S1x16AnyTrue)                      \
   V(Arm64S1x16AllTrue)                      \
+  V(Arm64Word64AtomicLoadUint8)             \
+  V(Arm64Word64AtomicLoadUint16)            \
+  V(Arm64Word64AtomicLoadUint32)            \
+  V(Arm64Word64AtomicLoadUint64)            \
+  V(Arm64Word64AtomicStoreWord8)            \
+  V(Arm64Word64AtomicStoreWord16)           \
+  V(Arm64Word64AtomicStoreWord32)           \
+  V(Arm64Word64AtomicStoreWord64)           \
   V(Arm64Word64AtomicAddUint8)              \
   V(Arm64Word64AtomicAddUint16)             \
   V(Arm64Word64AtomicAddUint32)             \
@@ -320,7 +328,15 @@ namespace compiler {
   V(Arm64Word64AtomicXorUint8)              \
   V(Arm64Word64AtomicXorUint16)             \
   V(Arm64Word64AtomicXorUint32)             \
-  V(Arm64Word64AtomicXorUint64)
+  V(Arm64Word64AtomicXorUint64)             \
+  V(Arm64Word64AtomicExchangeUint8)         \
+  V(Arm64Word64AtomicExchangeUint16)        \
+  V(Arm64Word64AtomicExchangeUint32)        \
+  V(Arm64Word64AtomicExchangeUint64)        \
+  V(Arm64Word64AtomicCompareExchangeUint8)  \
+  V(Arm64Word64AtomicCompareExchangeUint16) \
+  V(Arm64Word64AtomicCompareExchangeUint32) \
+  V(Arm64Word64AtomicCompareExchangeUint64)
 
 // Addressing modes represent the "shape" of inputs to an instruction.
 // Many instructions support multiple addressing modes. Addressing modes

src/compiler/arm64/instruction-scheduler-arm64.cc

@@ -309,6 +309,16 @@ int InstructionScheduler::GetTargetInstructionFlags(
     case kArm64DsbIsb:
       return kHasSideEffect;
 
+    case kArm64Word64AtomicLoadUint8:
+    case kArm64Word64AtomicLoadUint16:
+    case kArm64Word64AtomicLoadUint32:
+    case kArm64Word64AtomicLoadUint64:
+      return kIsLoadOperation;
+
+    case kArm64Word64AtomicStoreWord8:
+    case kArm64Word64AtomicStoreWord16:
+    case kArm64Word64AtomicStoreWord32:
+    case kArm64Word64AtomicStoreWord64:
     case kArm64Word64AtomicAddUint8:
     case kArm64Word64AtomicAddUint16:
     case kArm64Word64AtomicAddUint32:
@@ -329,6 +339,14 @@ int InstructionScheduler::GetTargetInstructionFlags(
     case kArm64Word64AtomicXorUint16:
     case kArm64Word64AtomicXorUint32:
     case kArm64Word64AtomicXorUint64:
+    case kArm64Word64AtomicExchangeUint8:
+    case kArm64Word64AtomicExchangeUint16:
+    case kArm64Word64AtomicExchangeUint32:
+    case kArm64Word64AtomicExchangeUint64:
+    case kArm64Word64AtomicCompareExchangeUint8:
+    case kArm64Word64AtomicCompareExchangeUint16:
+    case kArm64Word64AtomicCompareExchangeUint32:
+    case kArm64Word64AtomicCompareExchangeUint64:
       return kHasSideEffect;
 
 #define CASE(Name) case k##Name:

src/compiler/instruction-selector.cc

@@ -2317,15 +2317,13 @@ void InstructionSelector::VisitF32x4UConvertI32x4(Node* node) {
 #endif  // !V8_TARGET_ARCH_ARM && !V8_TARGET_ARCH_ARM64 && !V8_TARGET_ARCH_MIPS
         // && !V8_TARGET_ARCH_MIPS64 && !V8_TARGET_ARCH_IA32
 
-#if !V8_TARGET_ARCH_X64
+#if !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM64
 void InstructionSelector::VisitWord64AtomicLoad(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitWord64AtomicStore(Node* node) {
   UNIMPLEMENTED();
 }
-#endif  // !V8_TARGET_ARCH_X64
 
-#if !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM64
 void InstructionSelector::VisitWord64AtomicAdd(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitWord64AtomicSub(Node* node) { UNIMPLEMENTED(); }
@@ -2335,9 +2333,7 @@ void InstructionSelector::VisitWord64AtomicAnd(Node* node) { UNIMPLEMENTED(); }
 void InstructionSelector::VisitWord64AtomicOr(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitWord64AtomicXor(Node* node) { UNIMPLEMENTED(); }
-#endif  // !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM64
 
-#if !V8_TARGET_ARCH_X64
 void InstructionSelector::VisitWord64AtomicExchange(Node* node) {
   UNIMPLEMENTED();
 }
@@ -2345,7 +2341,7 @@ void InstructionSelector::VisitWord64AtomicExchange(Node* node) {
 void InstructionSelector::VisitWord64AtomicCompareExchange(Node* node) {
   UNIMPLEMENTED();
 }
-#endif  // !V8_TARGET_ARCH_X64
+#endif  // !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM64
 
 #if !V8_TARGET_ARCH_ARM && !V8_TARGET_ARCH_ARM64 && !V8_TARGET_ARCH_MIPS && \
     !V8_TARGET_ARCH_MIPS64

test/cctest/wasm/test-run-wasm-atomics64.cc

@@ -46,11 +46,9 @@ WASM_COMPILED_EXEC_TEST(I64AtomicOr) {
 WASM_COMPILED_EXEC_TEST(I64AtomicXor) {
   RunU64BinOp(execution_mode, kExprI64AtomicXor, Xor);
 }
-#if V8_TARGET_ARCH_X64
 WASM_COMPILED_EXEC_TEST(I64AtomicExchange) {
   RunU64BinOp(execution_mode, kExprI64AtomicExchange, Exchange);
 }
-#endif  // V8_TARGET_ARCH_X64
 
 void RunU32BinOp(WasmExecutionMode execution_mode, WasmOpcode wasm_op,
                  Uint32BinOp expected_op) {
@@ -88,11 +86,9 @@ WASM_COMPILED_EXEC_TEST(I64AtomicOr32U) {
 WASM_COMPILED_EXEC_TEST(I64AtomicXor32U) {
   RunU32BinOp(execution_mode, kExprI64AtomicXor32U, Xor);
 }
-#if V8_TARGET_ARCH_X64
 WASM_COMPILED_EXEC_TEST(I64AtomicExchange32U) {
   RunU32BinOp(execution_mode, kExprI64AtomicExchange32U, Exchange);
 }
-#endif  // V8_TARGET_ARCH_X64
 
 void RunU16BinOp(WasmExecutionMode mode, WasmOpcode wasm_op,
                  Uint16BinOp expected_op) {
@@ -130,11 +126,9 @@ WASM_COMPILED_EXEC_TEST(I64AtomicOr16U) {
 WASM_COMPILED_EXEC_TEST(I64AtomicXor16U) {
   RunU16BinOp(execution_mode, kExprI64AtomicXor16U, Xor);
 }
-#if V8_TARGET_ARCH_X64
 WASM_COMPILED_EXEC_TEST(I64AtomicExchange16U) {
   RunU16BinOp(execution_mode, kExprI64AtomicExchange16U, Exchange);
 }
-#endif  // V8_TARGET_ARCH_X64
 
 void RunU8BinOp(WasmExecutionMode execution_mode, WasmOpcode wasm_op,
                 Uint8BinOp expected_op) {
@@ -172,8 +166,6 @@ WASM_COMPILED_EXEC_TEST(I64AtomicOr8U) {
 WASM_COMPILED_EXEC_TEST(I64AtomicXor8U) {
   RunU8BinOp(execution_mode, kExprI64AtomicXor8U, Xor);
 }
-
-#if V8_TARGET_ARCH_X64
 WASM_COMPILED_EXEC_TEST(I64AtomicExchange8U) {
   RunU8BinOp(execution_mode, kExprI64AtomicExchange8U, Exchange);
 }
@@ -397,7 +389,6 @@ WASM_COMPILED_EXEC_TEST(I64AtomicStoreLoad8U) {
     CHECK_EQ(*i, r.builder().ReadMemory(&memory[0]));
   }
 }
-#endif  // V8_TARGET_ARCH_X64
 
 }  // namespace test_run_wasm_atomics_64
 }  // namespace wasm