Commit 0ed27704 authored by bjaideep's avatar bjaideep Committed by Commit bot

PPC: [builtins] Migrate Math.log to TurboFan.

Port f2da19fe

Original commit message:

    Introduce a dedicated Float64Log machine operator, that is either
    implemented by a direct C call or by platform specific code, i.e.
    using the FPU on x64 and ia32.

    This operator is used to implement Math.log as a proper TurboFan
    builtin on top of the CodeStubAssembler.

    Also introduce a NumberLog simplified operator on top of Float64Log
    and use that for the fast inline path of Math.log inside TurboFan
    optimized code.

R=bmeurer@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com, mbrandy@us.ibm.com

BUG=v8:5065
LOG=N

Review-Url: https://codereview.chromium.org/2036273002
Cr-Commit-Position: refs/heads/master@{#36720}
parent b9ded4ce
...@@ -437,6 +437,17 @@ Condition FlagsConditionToCondition(FlagsCondition condition, ArchOpcode op) { ...@@ -437,6 +437,17 @@ Condition FlagsConditionToCondition(FlagsCondition condition, ArchOpcode op) {
} while (0) } while (0)
#define ASSEMBLE_FLOAT_LOG() \
do { \
FrameScope scope(masm(), StackFrame::MANUAL); \
__ PrepareCallCFunction(0, 1, kScratchReg); \
__ MovToFloatParameter(i.InputDoubleRegister(0)); \
__ CallCFunction(ExternalReference::math_log_double_function(isolate()), \
0, 1); \
__ MovFromFloatResult(i.OutputDoubleRegister()); \
DCHECK_EQ(LeaveRC, i.OutputRCBit()); \
} while (0)
#define ASSEMBLE_FLOAT_MAX(scratch_reg) \ #define ASSEMBLE_FLOAT_MAX(scratch_reg) \
do { \ do { \
__ fsub(scratch_reg, i.InputDoubleRegister(0), i.InputDoubleRegister(1)); \ __ fsub(scratch_reg, i.InputDoubleRegister(0), i.InputDoubleRegister(1)); \
...@@ -1229,6 +1240,11 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( ...@@ -1229,6 +1240,11 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
// and generate a CallAddress instruction instead. // and generate a CallAddress instruction instead.
ASSEMBLE_FLOAT_MODULO(); ASSEMBLE_FLOAT_MODULO();
break; break;
case kPPC_LogDouble:
// TODO(bmeurer): We should really get rid of this special instruction,
// and generate a CallAddress instruction instead.
ASSEMBLE_FLOAT_LOG();
break;
case kPPC_Neg: case kPPC_Neg:
__ neg(i.OutputRegister(), i.InputRegister(0), LeaveOE, i.OutputRCBit()); __ neg(i.OutputRegister(), i.InputRegister(0), LeaveOE, i.OutputRCBit());
break; break;
......
...@@ -57,6 +57,7 @@ namespace compiler { ...@@ -57,6 +57,7 @@ namespace compiler {
V(PPC_ModU32) \ V(PPC_ModU32) \
V(PPC_ModU64) \ V(PPC_ModU64) \
V(PPC_ModDouble) \ V(PPC_ModDouble) \
V(PPC_LogDouble) \
V(PPC_Neg) \ V(PPC_Neg) \
V(PPC_NegDouble) \ V(PPC_NegDouble) \
V(PPC_SqrtDouble) \ V(PPC_SqrtDouble) \
......
...@@ -59,6 +59,7 @@ int InstructionScheduler::GetTargetInstructionFlags( ...@@ -59,6 +59,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
case kPPC_ModU32: case kPPC_ModU32:
case kPPC_ModU64: case kPPC_ModU64:
case kPPC_ModDouble: case kPPC_ModDouble:
case kPPC_LogDouble:
case kPPC_Neg: case kPPC_Neg:
case kPPC_NegDouble: case kPPC_NegDouble:
case kPPC_SqrtDouble: case kPPC_SqrtDouble:
......
...@@ -1310,6 +1310,11 @@ void InstructionSelector::VisitFloat64Abs(Node* node) { ...@@ -1310,6 +1310,11 @@ void InstructionSelector::VisitFloat64Abs(Node* node) {
VisitRR(this, kPPC_AbsDouble, node); VisitRR(this, kPPC_AbsDouble, node);
} }
void InstructionSelector::VisitFloat64Log(Node* node) {
PPCOperandGenerator g(this);
Emit(kPPC_LogDouble, g.DefineAsFixed(node, d1),
g.UseFixed(node->InputAt(0), d1))->MarkAsCall();
}
void InstructionSelector::VisitFloat32Sqrt(Node* node) { void InstructionSelector::VisitFloat32Sqrt(Node* node) {
VisitRR(this, kPPC_SqrtDouble | MiscField::encode(1), node); VisitRR(this, kPPC_SqrtDouble | MiscField::encode(1), node);
......
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