[x64] three operand imul supports first operand in memory location

R=bmeurer@chromium.org

Review URL: https://codereview.chromium.org/596643003

Patch from Weiliang Lin <weiliang.lin@intel.com>.

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@24199 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

src/compiler/x64/code-generator-x64.cc

@@ -277,8 +277,7 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
         if (input.type == kRegister) {
           __ imull(i.OutputRegister(), input.reg, i.InputImmediate(1));
         } else {
-          __ movq(kScratchRegister, input.operand);
-          __ imull(i.OutputRegister(), kScratchRegister, i.InputImmediate(1));
+          __ imull(i.OutputRegister(), input.operand, i.InputImmediate(1));
         }
       } else {
         RegisterOrOperand input = i.InputRegisterOrOperand(1);
@@ -295,8 +294,7 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
         if (input.type == kRegister) {
           __ imulq(i.OutputRegister(), input.reg, i.InputImmediate(1));
         } else {
-          __ movq(kScratchRegister, input.operand);
-          __ imulq(i.OutputRegister(), kScratchRegister, i.InputImmediate(1));
+          __ imulq(i.OutputRegister(), input.operand, i.InputImmediate(1));
         }
       } else {
         RegisterOrOperand input = i.InputRegisterOrOperand(1);

src/x64/assembler-x64.cc

@@ -942,6 +942,20 @@ void Assembler::emit_imul(Register dst, Register src, Immediate imm, int size) {
 }
 
 
+void Assembler::emit_imul(Register dst, const Operand& src, Immediate imm,
+                          int size) {
+  EnsureSpace ensure_space(this);
+  emit_rex(dst, src, size);
+  if (is_int8(imm.value_)) {
+    emit(0x6B);
+  } else {
+    emit(0x69);
+  }
+  emit_operand(dst, src);
+  emit(imm.value_);
+}
+
+
 void Assembler::emit_inc(Register dst, int size) {
   EnsureSpace ensure_space(this);
   emit_rex(dst, size);

src/x64/assembler-x64.h

@@ -1454,6 +1454,7 @@ class Assembler : public AssemblerBase {
   void emit_imul(Register dst, Register src, int size);
   void emit_imul(Register dst, const Operand& src, int size);
   void emit_imul(Register dst, Register src, Immediate imm, int size);
+  void emit_imul(Register dst, const Operand& src, Immediate imm, int size);
 
   void emit_inc(Register dst, int size);
   void emit_inc(const Operand& dst, int size);

test/cctest/test-disasm-x64.cc

@@ -167,6 +167,7 @@ TEST(DisasmX64) {
   __ imulq(rdx, Operand(rbx, rcx, times_4, 10000));
   __ imulq(rdx, rcx, Immediate(12));
   __ imulq(rdx, rcx, Immediate(1000));
+  __ imulq(rdx, Operand(rbx, rcx, times_4, 10000), Immediate(1000));
 
   __ incq(rdx);
   __ incq(Operand(rbx, rcx, times_4, 10000));