Commit 0e06c3bb authored by Ng Zhi An's avatar Ng Zhi An Committed by Commit Bot

[wasm-simd] Fix i64x2 splat isel on ia32

In the non-avx case, we are incorrectly using DefineSameAsFirst, which
is wrong, since operand0 is a 32-bit register, but the output should be
a simd register. This error was caught by running the test with flag:
--no-enable-avx, leading to a register allocator verifier failure.

Drive by cleanup to remove duplicate cases for avx and see in i64x2 replace
lane.

Bug: v8:9728
Change-Id: I96490c82e13660fc41e72ac523e5be37b051b624
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1866963
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Reviewed-by: 's avatarDeepti Gandluri <gdeepti@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64363}
parent 36ab93d8
...@@ -2089,11 +2089,7 @@ void InstructionSelector::VisitI64x2SplatI32Pair(Node* node) { ...@@ -2089,11 +2089,7 @@ void InstructionSelector::VisitI64x2SplatI32Pair(Node* node) {
IA32OperandGenerator g(this); IA32OperandGenerator g(this);
InstructionOperand operand0 = g.UseRegister(node->InputAt(0)); InstructionOperand operand0 = g.UseRegister(node->InputAt(0));
InstructionOperand operand1 = g.Use(node->InputAt(1)); InstructionOperand operand1 = g.Use(node->InputAt(1));
if (IsSupported(AVX)) {
Emit(kIA32I64x2SplatI32Pair, g.DefineAsRegister(node), operand0, operand1); Emit(kIA32I64x2SplatI32Pair, g.DefineAsRegister(node), operand0, operand1);
} else {
Emit(kIA32I64x2SplatI32Pair, g.DefineSameAsFirst(node), operand0, operand1);
}
} }
void InstructionSelector::VisitI64x2ReplaceLaneI32Pair(Node* node) { void InstructionSelector::VisitI64x2ReplaceLaneI32Pair(Node* node) {
...@@ -2102,13 +2098,8 @@ void InstructionSelector::VisitI64x2ReplaceLaneI32Pair(Node* node) { ...@@ -2102,13 +2098,8 @@ void InstructionSelector::VisitI64x2ReplaceLaneI32Pair(Node* node) {
InstructionOperand lane = g.UseImmediate(OpParameter<int32_t>(node->op())); InstructionOperand lane = g.UseImmediate(OpParameter<int32_t>(node->op()));
InstructionOperand low = g.Use(node->InputAt(1)); InstructionOperand low = g.Use(node->InputAt(1));
InstructionOperand high = g.Use(node->InputAt(2)); InstructionOperand high = g.Use(node->InputAt(2));
if (IsSupported(AVX)) {
Emit(kIA32I64x2ReplaceLaneI32Pair, g.DefineSameAsFirst(node), operand, lane, Emit(kIA32I64x2ReplaceLaneI32Pair, g.DefineSameAsFirst(node), operand, lane,
low, high); low, high);
} else {
Emit(kIA32I64x2ReplaceLaneI32Pair, g.DefineSameAsFirst(node), operand, lane,
low, high);
}
} }
void InstructionSelector::VisitF32x4Splat(Node* node) { void InstructionSelector::VisitF32x4Splat(Node* node) {
......
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