Commit 0d59772b authored by jkummerow's avatar jkummerow Committed by Commit bot

[crankshaft][arm][mips][mips64] Fix Math.min(0, 0)

for the special case where the same register is used as both left and
right input.

Review URL: https://codereview.chromium.org/1695283002

Cr-Commit-Position: refs/heads/master@{#33996}
parent 4c41d007
......@@ -1932,8 +1932,14 @@ void LCodeGen::DoMathMinMax(LMathMinMax* instr) {
// At this point, both left and right are either 0 or -0.
if (operation == HMathMinMax::kMathMin) {
// We could use a single 'vorr' instruction here if we had NEON support.
// The algorithm is: -((-L) + (-R)), which in case of L and R being
// different registers is most efficiently expressed as -((-L) - R).
__ vneg(left_reg, left_reg);
__ vsub(result_reg, left_reg, right_reg);
if (left_reg.is(right_reg)) {
__ vadd(result_reg, left_reg, right_reg);
} else {
__ vsub(result_reg, left_reg, right_reg);
}
__ vneg(result_reg, result_reg);
} else {
// Since we operate on +0 and/or -0, vadd and vand have the same effect;
......
......@@ -1789,8 +1789,14 @@ void LCodeGen::DoMathMinMax(LMathMinMax* instr) {
__ BranchF(&return_left, NULL, ne, left_reg, kDoubleRegZero);
// At this point, both left and right are either 0 or -0.
if (operation == HMathMinMax::kMathMin) {
// The algorithm is: -((-L) + (-R)), which in case of L and R being
// different registers is most efficiently expressed as -((-L) - R).
__ neg_d(left_reg, left_reg);
__ sub_d(result_reg, left_reg, right_reg);
if (left_reg.is(right_reg)) {
__ add_d(result_reg, left_reg, right_reg);
} else {
__ sub_d(result_reg, left_reg, right_reg);
}
__ neg_d(result_reg, result_reg);
} else {
__ add_d(result_reg, left_reg, right_reg);
......
......@@ -1906,8 +1906,14 @@ void LCodeGen::DoMathMinMax(LMathMinMax* instr) {
__ BranchF(&return_left, NULL, ne, left_reg, kDoubleRegZero);
// At this point, both left and right are either 0 or -0.
if (operation == HMathMinMax::kMathMin) {
// The algorithm is: -((-L) + (-R)), which in case of L and R being
// different registers is most efficiently expressed as -((-L) - R).
__ neg_d(left_reg, left_reg);
__ sub_d(result_reg, left_reg, right_reg);
if (left_reg.is(right_reg)) {
__ add_d(result_reg, left_reg, right_reg);
} else {
__ sub_d(result_reg, left_reg, right_reg);
}
__ neg_d(result_reg, result_reg);
} else {
__ add_d(result_reg, left_reg, right_reg);
......
// Copyright 2016 the V8 project authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.
// Flags: --allow-natives-syntax
var a = new Float64Array(4);
a[2] *= -1;
a[3] *= -1;
assertEquals(0, a[0]);
assertEquals(0, a[1]);
assertEquals(-0, a[2]);
assertEquals(-0, a[3]);
function f1() {
var z = a[0];
// Same register.
assertEquals(0, Math.min(z, z));
}
function f2() {
// Different registers.
assertEquals(0, Math.min(a[0], a[1]));
}
function f3() {
// Zero and minus zero.
assertEquals(-0, Math.min(a[1], a[2]));
}
function f4() {
// Zero and minus zero, reversed order.
assertEquals(-0, Math.min(a[2], a[1]));
}
function f5() {
// Minus zero, same register.
var m_z = a[2];
assertEquals(-0, Math.min(m_z, m_z));
}
function f6() {
// Minus zero, different registers.
assertEquals(-0, Math.min(a[2], a[3]));
}
for (var i = 0; i < 3; i++) {
f1();
f2();
f3();
f4();
f5();
f6();
}
%OptimizeFunctionOnNextCall(f1);
%OptimizeFunctionOnNextCall(f2);
%OptimizeFunctionOnNextCall(f3);
%OptimizeFunctionOnNextCall(f4);
%OptimizeFunctionOnNextCall(f5);
%OptimizeFunctionOnNextCall(f6);
f1();
f2();
f3();
f4();
f5();
f6();
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