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Commit 0d011fb2 authored by Zhao Jiazhong's avatar Zhao Jiazhong Committed by Commit Bot
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[mips][wasm-simd][liftoff] Implement neg 

Port 445f9ef1
https://crrev.com/c/2107511

Change-Id: Ib3517c186da6e49574b873ac568afd0e8e4336c5
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2143980Reviewed-by: 's avatarClemens Backes <clemensb@chromium.org>
Commit-Queue: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Cr-Commit-Position: refs/heads/master@{#67102}
parent 0b15ec3f
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src/wasm/baseline/mips/liftoff-assembler-mips.h
View file @ 0d011fb2
......@@ -1580,6 +1580,14 @@ void LiftoffAssembler::emit_f64x2_splat(LiftoffRegister dst,
bailout(kSimd, "emit_f64x2_splat");
}
void LiftoffAssembler::emit_i8x16_neg(LiftoffRegister dst,
LiftoffRegister src) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
// CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
// 3a4000 support MSA.
bailout(kSimd, "emit_i8x16_neg");
}
void LiftoffAssembler::emit_i8x16_add(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
......@@ -1658,6 +1666,14 @@ void LiftoffAssembler::emit_i8x16_max_u(LiftoffRegister dst,
bailout(kSimd, "emit_i8x16_max_u");
}
void LiftoffAssembler::emit_i16x8_neg(LiftoffRegister dst,
LiftoffRegister src) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
// CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
// 3a4000 support MSA.
bailout(kSimd, "emit_i16x8_neg");
}
void LiftoffAssembler::emit_i16x8_add(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
......@@ -1736,6 +1752,14 @@ void LiftoffAssembler::emit_i16x8_max_u(LiftoffRegister dst,
bailout(kSimd, "emit_i16x8_max_u");
}
void LiftoffAssembler::emit_i32x4_neg(LiftoffRegister dst,
LiftoffRegister src) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
// CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
// 3a4000 support MSA.
bailout(kSimd, "emit_i32x4_neg");
}
void LiftoffAssembler::emit_i32x4_add(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
......@@ -1796,6 +1820,14 @@ void LiftoffAssembler::emit_i32x4_max_u(LiftoffRegister dst,
bailout(kSimd, "emit_i32x4_max_u");
}
void LiftoffAssembler::emit_i64x2_neg(LiftoffRegister dst,
LiftoffRegister src) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
// CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
// 3a4000 support MSA.
bailout(kSimd, "emit_i64x2_neg");
}
void LiftoffAssembler::emit_i64x2_add(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
......@@ -1820,6 +1852,14 @@ void LiftoffAssembler::emit_i64x2_mul(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_i64x2_mul");
}
void LiftoffAssembler::emit_f32x4_neg(LiftoffRegister dst,
LiftoffRegister src) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
// CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
// 3a4000 support MSA.
bailout(kSimd, "emit_f32x4_neg");
}
void LiftoffAssembler::emit_f32x4_add(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
......@@ -1844,6 +1884,14 @@ void LiftoffAssembler::emit_f32x4_mul(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_f32x4_mul");
}
void LiftoffAssembler::emit_f64x2_neg(LiftoffRegister dst,
LiftoffRegister src) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
// CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
// 3a4000 support MSA.
bailout(kSimd, "emit_f64x2_neg");
}
void LiftoffAssembler::emit_f64x2_add(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
......
src/wasm/baseline/mips64/liftoff-assembler-mips64.h
View file @ 0d011fb2
......@@ -1372,6 +1372,14 @@ void LiftoffAssembler::emit_f64x2_splat(LiftoffRegister dst,
bailout(kSimd, "emit_f64x2_splat");
}
void LiftoffAssembler::emit_i8x16_neg(LiftoffRegister dst,
LiftoffRegister src) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
// CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
// 3a4000 support MSA.
bailout(kSimd, "emit_i8x16_neg");
}
void LiftoffAssembler::emit_i8x16_add(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
......@@ -1450,6 +1458,14 @@ void LiftoffAssembler::emit_i8x16_max_u(LiftoffRegister dst,
bailout(kSimd, "emit_i8x16_max_u");
}
void LiftoffAssembler::emit_i16x8_neg(LiftoffRegister dst,
LiftoffRegister src) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
// CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
// 3a4000 support MSA.
bailout(kSimd, "emit_i16x8_neg");
}
void LiftoffAssembler::emit_i16x8_add(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
......@@ -1528,6 +1544,14 @@ void LiftoffAssembler::emit_i16x8_max_u(LiftoffRegister dst,
bailout(kSimd, "emit_i16x8_max_u");
}
void LiftoffAssembler::emit_i32x4_neg(LiftoffRegister dst,
LiftoffRegister src) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
// CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
// 3a4000 support MSA.
bailout(kSimd, "emit_i32x4_neg");
}
void LiftoffAssembler::emit_i32x4_add(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
......@@ -1588,6 +1612,14 @@ void LiftoffAssembler::emit_i32x4_max_u(LiftoffRegister dst,
bailout(kSimd, "emit_i32x4_max_u");
}
void LiftoffAssembler::emit_i64x2_neg(LiftoffRegister dst,
LiftoffRegister src) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
// CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
// 3a4000 support MSA.
bailout(kSimd, "emit_i64x2_neg");
}
void LiftoffAssembler::emit_i64x2_add(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
......@@ -1612,6 +1644,14 @@ void LiftoffAssembler::emit_i64x2_mul(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_i64x2_mul");
}
void LiftoffAssembler::emit_f32x4_neg(LiftoffRegister dst,
LiftoffRegister src) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
// CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
// 3a4000 support MSA.
bailout(kSimd, "emit_f32x4_neg");
}
void LiftoffAssembler::emit_f32x4_add(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
......@@ -1636,6 +1676,14 @@ void LiftoffAssembler::emit_f32x4_mul(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_f32x4_mul");
}
void LiftoffAssembler::emit_f64x2_neg(LiftoffRegister dst,
LiftoffRegister src) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
// CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
// 3a4000 support MSA.
bailout(kSimd, "emit_f64x2_neg");
}
void LiftoffAssembler::emit_f64x2_add(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
......
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