MIPS: Fix bad RegisterConfiguration usage in InstructionSequence unit tests.

Test InstructionSequenceTest has been initialized with a testing RegisterConfiguration
instance defined in instruction-sequence-unittest.h, whereas class ExplicitOperand which
is being tested used RegisterConfiguration from instruction.cc. In case these two
instances are different, the tests would fail. The issue is fixed by using the same
instance of RegisterConfiguration both for test code and code under test.

Additionally, the tests in register-allocator-unittest.cc use hardcoded values
for register and begin failing is the hardcoded register is not available for
allocation. Fix by forcing the use of allocatable registers only.

TEST=unittests.MoveOptimizerTest.RemovesRedundantExplicit,unittests.RegisterAllocatorTest.SpillPhi
BUG=

Review-Url: https://codereview.chromium.org/2433093002
Cr-Commit-Position: refs/heads/master@{#40862}

src/compiler/instruction.cc

@@ -12,7 +12,8 @@ namespace v8 {
 namespace internal {
 namespace compiler {
 
-const auto GetRegConfig = RegisterConfiguration::Turbofan;
+const RegisterConfiguration* (*GetRegConfig)() =
+    RegisterConfiguration::Turbofan;
 
 FlagsCondition CommuteFlagsCondition(FlagsCondition condition) {
   switch (condition) {
@@ -981,6 +982,11 @@ void InstructionSequence::PrintBlock(int block_id) const {
   PrintBlock(GetRegConfig(), block_id);
 }
 
+const RegisterConfiguration*
+InstructionSequence::GetRegisterConfigurationForTesting() {
+  return GetRegConfig();
+}
+
 FrameStateDescriptor::FrameStateDescriptor(
     Zone* zone, FrameStateType type, BailoutId bailout_id,
     OutputFrameStateCombine state_combine, size_t parameters_count,

src/compiler/instruction.h

@@ -1505,6 +1505,8 @@ class V8_EXPORT_PRIVATE InstructionSequence final
   void ValidateDeferredBlockEntryPaths() const;
   void ValidateSSA() const;
 
+  const RegisterConfiguration* GetRegisterConfigurationForTesting();
+
  private:
   friend V8_EXPORT_PRIVATE std::ostream& operator<<(
       std::ostream& os, const PrintableInstructionSequence& code);

test/unittests/compiler/instruction-sequence-unittest.cc

@@ -19,11 +19,6 @@ static const char*
 static char register_names_[10 * (RegisterConfiguration::kMaxGeneralRegisters +
                                   RegisterConfiguration::kMaxFPRegisters)];
 
-namespace {
-static int allocatable_codes[InstructionSequenceTest::kDefaultNRegs] = {
-    0, 1, 2, 3, 4, 5, 6, 7};
-}
-
 static void InitializeRegisterNames() {
   char* loc = register_names_;
   for (int i = 0; i < RegisterConfiguration::kMaxGeneralRegisters; ++i) {
@@ -85,19 +80,8 @@ int InstructionSequenceTest::GetAllocatableCode(int index,
   }
 }
 
-RegisterConfiguration* InstructionSequenceTest::config() {
-  if (!config_) {
-    config_.reset(new RegisterConfiguration(
-        num_general_registers_, num_double_registers_, num_general_registers_,
-        num_double_registers_, allocatable_codes, allocatable_codes,
-        kSimpleFPAliasing ? RegisterConfiguration::OVERLAP
-                          : RegisterConfiguration::COMBINE,
-        general_register_names_,
-        double_register_names_,  // float register names
-        double_register_names_,
-        double_register_names_));  // SIMD 128 register names
-  }
-  return config_.get();
+const RegisterConfiguration* InstructionSequenceTest::config() {
+  return sequence()->GetRegisterConfigurationForTesting();
 }
 
 

test/unittests/compiler/instruction-sequence-unittest.h

@@ -158,7 +158,7 @@ class InstructionSequenceTest : public TestWithIsolateAndZone {
   void SetNumRegs(int num_general_registers, int num_double_registers);
   int GetNumRegs(MachineRepresentation rep);
   int GetAllocatableCode(int index, MachineRepresentation rep = kNoRep);
-  RegisterConfiguration* config();
+  const RegisterConfiguration* config();
   InstructionSequence* sequence();
 
   void StartLoop(int loop_blocks);

test/unittests/compiler/register-allocator-unittest.cc

@@ -321,11 +321,11 @@ TEST_F(RegisterAllocatorTest, SpillPhi) {
   EndBlock(Branch(Imm(), 1, 2));
 
   StartBlock();
-  auto left = Define(Reg(0));
+  auto left = Define(Reg(GetAllocatableCode(0)));
   EndBlock(Jump(2));
 
   StartBlock();
-  auto right = Define(Reg(0));
+  auto right = Define(Reg(GetAllocatableCode(0)));
   EndBlock();
 
   StartBlock();