[mips][liftoff] Fix zeroing the stack.

The Sw/Sd in FillStackSlotsWithZero should't use kSystemPointerSize as
address offset, because the start address should be inclusive, and
the end address should be exclusive.

The skip-stack-guard-page test case failed due to this bug, and besides,
it also needs larger stack size on mips simulator.

Change-Id: Ieff55fe2c5a13e6dad1c5d073e1c0d22fe789d41
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2282663
Commit-Queue: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Reviewed-by: Jakob Gruber <jgruber@chromium.org>
Reviewed-by: Andreas Haas <ahaas@chromium.org>
Cr-Commit-Position: refs/heads/master@{#68834}

src/execution/mips/simulator-mips.cc

@@ -855,6 +855,7 @@ void Simulator::CheckICache(base::CustomMatcherHashMap* i_cache,
 Simulator::Simulator(Isolate* isolate) : isolate_(isolate) {
   // Set up simulator support first. Some of this information is needed to
   // setup the architecture state.
+  stack_size_ = FLAG_sim_stack_size * KB;
   stack_ = reinterpret_cast<char*>(malloc(stack_size_));
   pc_modified_ = false;
   icount_ = 0;

src/execution/mips/simulator-mips.h

@@ -590,8 +590,7 @@ class Simulator : public SimulatorBase {
   uint32_t MSACSR_;
 
   // Simulator support.
-  // Allocate 1MB for stack.
-  static const size_t stack_size_ = 1 * 1024 * 1024;
+  size_t stack_size_;
   char* stack_;
   bool pc_modified_;
   uint64_t icount_;

src/flags/flag-definitions.h

@@ -1313,7 +1313,7 @@ DEFINE_INT(sim_stack_alignment, 8,
            "Stack alingment in bytes in simulator (4 or 8, 8 is default)")
 #endif
 DEFINE_INT(sim_stack_size, 2 * MB / KB,
-           "Stack size of the ARM64, MIPS64 and PPC64 simulator "
+           "Stack size of the ARM64, MIPS, MIPS64 and PPC64 simulator "
            "in kBytes (default is 2 MB)")
 DEFINE_BOOL(log_colour, ENABLE_LOG_COLOUR,
             "When logging, try to use coloured output.")

src/wasm/baseline/mips/liftoff-assembler-mips.h

@@ -718,7 +718,7 @@ void LiftoffAssembler::FillStackSlotsWithZero(int start, int size) {
 
     Label loop;
     bind(&loop);
-    Sw(zero_reg, MemOperand(a0, kSystemPointerSize));
+    Sw(zero_reg, MemOperand(a0));
     addiu(a0, a0, kSystemPointerSize);
     BranchShort(&loop, ne, a0, Operand(a1));
 

src/wasm/baseline/mips64/liftoff-assembler-mips64.h

@@ -654,7 +654,7 @@ void LiftoffAssembler::FillStackSlotsWithZero(int start, int size) {
 
     Label loop;
     bind(&loop);
-    Sd(zero_reg, MemOperand(a0, kSystemPointerSize));
+    Sd(zero_reg, MemOperand(a0));
     daddiu(a0, a0, kSystemPointerSize);
     BranchShort(&loop, ne, a0, Operand(a1));
 

test/wasm-spec-tests/wasm-spec-tests.status

@@ -4,8 +4,7 @@
 
 [
 [ALWAYS, {
-  #TODO(ahaas): Add additional stack checks on mips.
-  'skip-stack-guard-page': [PASS, ['arch == mipsel or arch == mips64el or ((arch == ppc or arch == ppc64 or arch == s390 or arch == s390x) and simulator_run)', SKIP]],
+  'skip-stack-guard-page': [PASS, ['((arch == ppc or arch == ppc64 or arch == s390 or arch == s390x) and simulator_run)', SKIP]],
 
   # TODO(v8:9144): The MVP behavior when bounds-checking segments changed in
   # the bulk-memory proposal. Since we've enabled bulk-memory by default, we
@@ -76,6 +75,12 @@
   'conversions': [SKIP],
 }],  # '(arch == mipsel or arch == mips64el or arch == mips or arch == mips64) and not simulator_run'
 
+['(arch == mipsel or arch == mips64el) and simulator_run', {
+  # These tests need larger stack size on simulator.
+  'skip-stack-guard-page': '--sim-stack-size=8192',
+  'proposals/tail-call/skip-stack-guard-page': '--sim-stack-size=8192',
+}],  # '(arch == mipsel or arch == mips64el) and simulator_run'
+
 ['arch == ppc or arch == ppc64', {
   # These tests fail because ppc float min and max doesn't convert sNaN to qNaN.
   'f32': [SKIP],