Commit 07b33419 authored by Zhi An Ng's avatar Zhi An Ng Committed by Commit Bot

[ia32] Use movaps instead of movapd where applicable

movaps is 1 byte shorter than movapd and is equivalent.

Fixed: v8:11116
Change-Id: Ibf32ad5428ac3d55d055f8725fbf2e96433fb97a
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2601878
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Reviewed-by: 's avatarBill Budge <bbudge@chromium.org>
Cr-Commit-Position: refs/heads/master@{#71933}
parent 843fc4c5
......@@ -1751,17 +1751,14 @@ void TurboAssembler::Pshufb(XMMRegister dst, XMMRegister src, Operand mask) {
vpshufb(dst, src, mask);
return;
}
if (CpuFeatures::IsSupported(SSSE3)) {
// Make sure these are different so that we won't overwrite mask.
DCHECK(!mask.is_reg(dst));
CpuFeatureScope sse_scope(this, SSSE3);
if (dst != src) {
movapd(dst, src);
}
pshufb(dst, mask);
return;
// Make sure these are different so that we won't overwrite mask.
DCHECK(!mask.is_reg(dst));
CpuFeatureScope sse_scope(this, SSSE3);
if (dst != src) {
movaps(dst, src);
}
FATAL("no AVX or SSE3 support");
pshufb(dst, mask);
}
void TurboAssembler::Pblendw(XMMRegister dst, Operand src, uint8_t imm8) {
......
......@@ -1117,7 +1117,7 @@ void LiftoffAssembler::Move(DoubleRegister dst, DoubleRegister src,
movsd(dst, src);
} else {
DCHECK_EQ(kWasmS128, type);
movapd(dst, src);
Movaps(dst, src);
}
}
......@@ -3749,7 +3749,7 @@ void LiftoffAssembler::emit_i64x2_neg(LiftoffRegister dst,
vpsubq(dst.fp(), reg, src.fp());
} else {
psubq(reg, src.fp());
if (dst.fp() != reg) movapd(dst.fp(), reg);
if (dst.fp() != reg) movaps(dst.fp(), reg);
}
}
......@@ -4140,13 +4140,13 @@ void LiftoffAssembler::emit_f64x2_min(LiftoffRegister dst, LiftoffRegister lhs,
vminpd(dst.fp(), rhs.fp(), lhs.fp());
} else if (dst.fp() == lhs.fp() || dst.fp() == rhs.fp()) {
XMMRegister src = dst.fp() == lhs.fp() ? rhs.fp() : lhs.fp();
movapd(liftoff::kScratchDoubleReg, src);
movaps(liftoff::kScratchDoubleReg, src);
minpd(liftoff::kScratchDoubleReg, dst.fp());
minpd(dst.fp(), src);
} else {
movapd(liftoff::kScratchDoubleReg, lhs.fp());
movaps(liftoff::kScratchDoubleReg, lhs.fp());
minpd(liftoff::kScratchDoubleReg, rhs.fp());
movapd(dst.fp(), rhs.fp());
movaps(dst.fp(), rhs.fp());
minpd(dst.fp(), lhs.fp());
}
// propagate -0's and NaNs, which may be non-canonical.
......@@ -4168,13 +4168,13 @@ void LiftoffAssembler::emit_f64x2_max(LiftoffRegister dst, LiftoffRegister lhs,
vmaxpd(dst.fp(), rhs.fp(), lhs.fp());
} else if (dst.fp() == lhs.fp() || dst.fp() == rhs.fp()) {
XMMRegister src = dst.fp() == lhs.fp() ? rhs.fp() : lhs.fp();
movapd(liftoff::kScratchDoubleReg, src);
movaps(liftoff::kScratchDoubleReg, src);
maxpd(liftoff::kScratchDoubleReg, dst.fp());
maxpd(dst.fp(), src);
} else {
movapd(liftoff::kScratchDoubleReg, lhs.fp());
movaps(liftoff::kScratchDoubleReg, lhs.fp());
maxpd(liftoff::kScratchDoubleReg, rhs.fp());
movapd(dst.fp(), rhs.fp());
movaps(dst.fp(), rhs.fp());
maxpd(dst.fp(), lhs.fp());
}
// Find discrepancies.
......
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