Commit 069c6396 authored by Thibaud Michaud's avatar Thibaud Michaud Committed by V8 LUCI CQ

[wasm][liftoff] Prepare arm port of NaN detection

Make "emit_s128_set_if_nan" take LiftoffRegisters rather than Registers.
The decoding of the FP register code is architecture dependent, and in
particular we expect an FP pair on arm.

R=clemensb@chromium.org

Bug: v8:11856
Change-Id: I44a364c3ef3a0c41000ea1f6cead4916ee04145d
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3089165Reviewed-by: 's avatarClemens Backes <clemensb@chromium.org>
Commit-Queue: Thibaud Michaud <thibaudm@chromium.org>
Cr-Commit-Position: refs/heads/master@{#76246}
parent 346f1b61
......@@ -4265,9 +4265,9 @@ void LiftoffAssembler::emit_set_if_nan(Register dst, DoubleRegister src,
UNIMPLEMENTED();
}
void LiftoffAssembler::emit_s128_set_if_nan(Register dst, DoubleRegister src,
void LiftoffAssembler::emit_s128_set_if_nan(Register dst, LiftoffRegister src,
Register tmp_gp,
DoubleRegister tmp_fp,
LiftoffRegister tmp_s128,
ValueKind lane_kind) {
UNIMPLEMENTED();
}
......
......@@ -3252,9 +3252,9 @@ void LiftoffAssembler::emit_set_if_nan(Register dst, DoubleRegister src,
UNIMPLEMENTED();
}
void LiftoffAssembler::emit_s128_set_if_nan(Register dst, DoubleRegister src,
void LiftoffAssembler::emit_s128_set_if_nan(Register dst, LiftoffRegister src,
Register tmp_gp,
DoubleRegister tmp_fp,
LiftoffRegister tmp_s128,
ValueKind lane_kind) {
UNIMPLEMENTED();
}
......
......@@ -4817,19 +4817,19 @@ void LiftoffAssembler::emit_set_if_nan(Register dst, DoubleRegister src,
bind(&ret);
}
void LiftoffAssembler::emit_s128_set_if_nan(Register dst, DoubleRegister src,
void LiftoffAssembler::emit_s128_set_if_nan(Register dst, LiftoffRegister src,
Register tmp_gp,
DoubleRegister tmp_fp,
LiftoffRegister tmp_s128,
ValueKind lane_kind) {
if (lane_kind == kF32) {
movaps(tmp_fp, src);
cmpunordps(tmp_fp, tmp_fp);
movaps(tmp_s128.fp(), src.fp());
cmpunordps(tmp_s128.fp(), tmp_s128.fp());
} else {
DCHECK_EQ(lane_kind, kF64);
movapd(tmp_fp, src);
cmpunordpd(tmp_fp, tmp_fp);
movapd(tmp_s128.fp(), src.fp());
cmpunordpd(tmp_s128.fp(), tmp_s128.fp());
}
pmovmskb(tmp_gp, tmp_fp);
pmovmskb(tmp_gp, tmp_s128.fp());
or_(Operand(dst, 0), tmp_gp);
}
......
......@@ -1460,8 +1460,8 @@ class LiftoffAssembler : public TurboAssembler {
inline void emit_set_if_nan(Register dst, DoubleRegister src, ValueKind kind);
// Set the i32 at address dst to a non-zero value if src contains a NaN.
inline void emit_s128_set_if_nan(Register dst, DoubleRegister src,
Register tmp_gp, DoubleRegister tmp_fp,
inline void emit_s128_set_if_nan(Register dst, LiftoffRegister src,
Register tmp_gp, LiftoffRegister tmp_s128,
ValueKind lane_kind);
////////////////////////////////////
......
......@@ -6151,14 +6151,14 @@ class LiftoffCompiler {
ValueKind lane_kind) {
RegClass rc = reg_class_for(kS128);
LiftoffRegister tmp_gp = pinned.set(__ GetUnusedRegister(kGpReg, pinned));
LiftoffRegister tmp_fp = pinned.set(__ GetUnusedRegister(rc, pinned));
LiftoffRegister tmp_s128 = pinned.set(__ GetUnusedRegister(rc, pinned));
LiftoffRegister nondeterminism_addr =
pinned.set(__ GetUnusedRegister(kGpReg, pinned));
__ LoadConstant(
nondeterminism_addr,
WasmValue::ForUintPtr(reinterpret_cast<uintptr_t>(nondeterminism_)));
__ emit_s128_set_if_nan(nondeterminism_addr.gp(), dst.fp(), tmp_gp.gp(),
tmp_fp.fp(), lane_kind);
__ emit_s128_set_if_nan(nondeterminism_addr.gp(), dst, tmp_gp.gp(),
tmp_s128, lane_kind);
}
static constexpr WasmOpcode kNoOutstandingOp = kExprUnreachable;
......
......@@ -3078,9 +3078,9 @@ void LiftoffAssembler::emit_set_if_nan(Register dst, FPURegister src,
Sw(scratch, MemOperand(dst));
}
void LiftoffAssembler::emit_s128_set_if_nan(Register dst, DoubleRegister src,
void LiftoffAssembler::emit_s128_set_if_nan(Register dst, LiftoffRegister src,
Register tmp_gp,
DoubleRegister tmp_fp,
LiftoffRegister tmp_s128,
ValueKind lane_kind) {
UNIMPLEMENTED();
}
......
......@@ -3246,9 +3246,9 @@ void LiftoffAssembler::emit_set_if_nan(Register dst, FPURegister src,
Sd(scratch, MemOperand(dst));
}
void LiftoffAssembler::emit_s128_set_if_nan(Register dst, DoubleRegister src,
void LiftoffAssembler::emit_s128_set_if_nan(Register dst, LiftoffRegister src,
Register tmp_gp,
DoubleRegister tmp_fp,
LiftoffRegister tmp_s128,
ValueKind lane_kind) {
UNIMPLEMENTED();
}
......
......@@ -2405,9 +2405,9 @@ void LiftoffAssembler::emit_set_if_nan(Register dst, DoubleRegister src,
UNIMPLEMENTED();
}
void LiftoffAssembler::emit_s128_set_if_nan(Register dst, DoubleRegister src,
void LiftoffAssembler::emit_s128_set_if_nan(Register dst, LiftoffRegister src,
Register tmp_gp,
DoubleRegister tmp_fp,
LiftoffRegister tmp_s128,
ValueKind lane_kind) {
UNIMPLEMENTED();
}
......
......@@ -2730,9 +2730,9 @@ void LiftoffAssembler::emit_f64x2_replace_lane(LiftoffRegister dst,
bailout(kSimd, "emit_f64x2_replace_lane");
}
void LiftoffAssembler::emit_s128_set_if_nan(Register dst, DoubleRegister src,
void LiftoffAssembler::emit_s128_set_if_nan(Register dst, LiftoffRegister src,
Register tmp_gp,
DoubleRegister tmp_fp,
LiftoffRegister tmp_s128,
ValueKind lane_kind) {
bailout(kSimd, "emit_s128_set_if_nan");
}
......
......@@ -3137,9 +3137,9 @@ void LiftoffAssembler::emit_set_if_nan(Register dst, DoubleRegister src,
UNIMPLEMENTED();
}
void LiftoffAssembler::emit_s128_set_if_nan(Register dst, DoubleRegister src,
void LiftoffAssembler::emit_s128_set_if_nan(Register dst, LiftoffRegister src,
Register tmp_gp,
DoubleRegister tmp_fp,
LiftoffRegister tmp_s128,
ValueKind lane_kind) {
UNIMPLEMENTED();
}
......
......@@ -4357,19 +4357,19 @@ void LiftoffAssembler::emit_set_if_nan(Register dst, DoubleRegister src,
bind(&ret);
}
void LiftoffAssembler::emit_s128_set_if_nan(Register dst, DoubleRegister src,
void LiftoffAssembler::emit_s128_set_if_nan(Register dst, LiftoffRegister src,
Register tmp_gp,
DoubleRegister tmp_fp,
LiftoffRegister tmp_s128,
ValueKind lane_kind) {
if (lane_kind == kF32) {
movaps(tmp_fp, src);
cmpunordps(tmp_fp, tmp_fp);
movaps(tmp_s128.fp(), src.fp());
cmpunordps(tmp_s128.fp(), tmp_s128.fp());
} else {
DCHECK_EQ(lane_kind, kF64);
movapd(tmp_fp, src);
cmpunordpd(tmp_fp, tmp_fp);
movapd(tmp_s128.fp(), src.fp());
cmpunordpd(tmp_s128.fp(), tmp_s128.fp());
}
pmovmskb(tmp_gp, tmp_fp);
pmovmskb(tmp_gp, tmp_s128.fp());
orl(Operand(dst, 0), tmp_gp);
}
......
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