Commit 0553ebda authored by Milad Farazmand's avatar Milad Farazmand Committed by Commit Bot

PPC/s390: [cctest] Add V8_EXPORT_PRIVATE to arm/arm64 ports

Port 1a7d847c

R=sigurds@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com
BUG=
LOG=N

Change-Id: I13df37162f26a32512ac4897e4f6657db28d0fb6
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1600756Reviewed-by: 's avatarJunliang Yan <jyan@ca.ibm.com>
Reviewed-by: 's avatarSigurd Schneider <sigurds@chromium.org>
Commit-Queue: Junliang Yan <jyan@ca.ibm.com>
Cr-Commit-Position: refs/heads/master@{#61346}
parent 44382e94
......@@ -61,7 +61,7 @@ class SafepointTableBuilder;
// Machine instruction Operands
// Class Operand represents a shifter operand in data processing instructions
class Operand {
class V8_EXPORT_PRIVATE Operand {
public:
// immediate
V8_INLINE explicit Operand(intptr_t immediate,
......@@ -126,11 +126,10 @@ class Operand {
friend class MacroAssembler;
};
// Class MemOperand represents a memory operand in load and store instructions
// On PowerPC we have base register + 16bit signed value
// Alternatively we can have a 16bit signed value immediate
class MemOperand {
class V8_EXPORT_PRIVATE MemOperand {
public:
explicit MemOperand(Register rn, int32_t offset = 0);
......@@ -157,7 +156,6 @@ class MemOperand {
friend class Assembler;
};
class DeferredRelocInfo {
public:
DeferredRelocInfo() {}
......
......@@ -88,7 +88,7 @@ class SafepointTableBuilder;
// Class Operand represents a shifter operand in data processing instructions
// defining immediate numbers and masks
class Operand {
class V8_EXPORT_PRIVATE Operand {
public:
// immediate
V8_INLINE explicit Operand(intptr_t immediate,
......@@ -167,7 +167,7 @@ typedef int32_t Disp;
// 1) a base register + 16 bit unsigned displacement
// 2) a base register + index register + 16 bit unsigned displacement
// 3) a base register + index register + 20 bit signed displacement
class MemOperand {
class V8_EXPORT_PRIVATE MemOperand {
public:
explicit MemOperand(Register rx, Disp offset = 0);
explicit MemOperand(Register rx, Register rb, Disp offset = 0);
......
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