[Liftoff] Implement f64 loads and stores

R=titzer@chromium.org

Bug: v8:6600
Change-Id: Id2bd29b89a0db47d7e9ea957521df1558baa6e4a
Reviewed-on: https://chromium-review.googlesource.com/926201
Commit-Queue: Clemens Hammacher <clemensh@chromium.org>
Reviewed-by: Ben Titzer <titzer@chromium.org>
Cr-Commit-Position: refs/heads/master@{#51422}

src/wasm/baseline/ia32/liftoff-assembler-ia32.h

@@ -175,9 +175,6 @@ void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr,
       mov(dst.high_gp(), dst.low_gp());
       sar(dst.high_gp(), 31);
       break;
-    case LoadType::kF32Load:
-      movss(dst.fp(), src_op);
-      break;
     case LoadType::kI64Load: {
       // Compute the operand for the load of the upper half.
       Operand upper_src_op =
@@ -193,6 +190,12 @@ void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr,
       mov(dst.low_gp(), src_op);
       break;
     }
+    case LoadType::kF32Load:
+      movss(dst.fp(), src_op);
+      break;
+    case LoadType::kF64Load:
+      movsd(dst.fp(), src_op);
+      break;
     default:
       UNREACHABLE();
   }
@@ -265,6 +268,9 @@ void LiftoffAssembler::Store(Register dst_addr, Register offset_reg,
     case StoreType::kF32Store:
       movss(dst_op, src.fp());
       break;
+    case StoreType::kF64Store:
+      movsd(dst_op, src.fp());
+      break;
     default:
       UNREACHABLE();
   }

src/wasm/baseline/liftoff-compiler.cc

@@ -76,8 +76,6 @@ compiler::CallDescriptor* GetLoweredCallDescriptor(
                            : call_desc;
 }
 
-constexpr ValueType kTypesArr_ilf[] = {kWasmI32, kWasmI64, kWasmF32};
-constexpr Vector<const ValueType> kTypes_ilf = ArrayVector(kTypesArr_ilf);
 constexpr ValueType kTypesArr_ilfd[] = {kWasmI32, kWasmI64, kWasmF32, kWasmF64};
 constexpr Vector<const ValueType> kTypes_ilfd = ArrayVector(kTypesArr_ilfd);
 
@@ -1032,7 +1030,7 @@ class LiftoffCompiler {
                const MemoryAccessOperand<validate>& operand,
                const Value& index_val, Value* result) {
     ValueType value_type = type.value_type();
-    if (!CheckSupportedType(decoder, kTypes_ilf, value_type, "load")) return;
+    if (!CheckSupportedType(decoder, kTypes_ilfd, value_type, "load")) return;
     LiftoffRegList pinned;
     Register index = pinned.set(__ PopToRegister(kGpReg)).gp();
     if (!env_->use_trap_handler) {
@@ -1065,7 +1063,7 @@ class LiftoffCompiler {
                 const MemoryAccessOperand<validate>& operand,
                 const Value& index_val, const Value& value_val) {
     ValueType value_type = type.value_type();
-    if (!CheckSupportedType(decoder, kTypes_ilf, value_type, "store")) return;
+    if (!CheckSupportedType(decoder, kTypes_ilfd, value_type, "store")) return;
     RegClass rc = reg_class_for(value_type);
     LiftoffRegList pinned;
     LiftoffRegister value = pinned.set(__ PopToRegister(rc));

src/wasm/baseline/x64/liftoff-assembler-x64.h

@@ -158,6 +158,9 @@ void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr,
     case LoadType::kF32Load:
       Movss(dst.fp(), src_op);
       break;
+    case LoadType::kF64Load:
+      Movsd(dst.fp(), src_op);
+      break;
     default:
       UNREACHABLE();
   }
@@ -200,6 +203,9 @@ void LiftoffAssembler::Store(Register dst_addr, Register offset_reg,
     case StoreType::kF32Store:
       Movss(dst_op, src.fp());
       break;
+    case StoreType::kF64Store:
+      Movsd(dst_op, src.fp());
+      break;
     default:
       UNREACHABLE();
   }