Port e47f9a9d
https://crrev.com/c/2102570

Original Commit Message:

  The set of registers to spill was wrong. Instead of spilling wasm
  parameter registers (like the WasmCompileLazy builtin), we should spill
  all registers that are being used as Liftoff cache registers.
  This CL defines platform-specific WasmDebugBreakFrameConstants which
  hold the set of registers to spill. This set is used in the builtin, and
  will later be used for inspecting the spilled registers.

  In order to iterate bit sets more easily in both direction (MSB to LSB
  or LSB to MSB), we add a base::bits::IterateBits{,Backwards} method
  which provides the respective iterators.

Change-Id: I1137a0b8bcb20d994bfc8662f0a938b627582fbd
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2105495Reviewed-by: Clemens Backes <clemensb@chromium.org>
Reviewed-by: Jakob Kummerow <jkummerow@chromium.org>
Commit-Queue: Jakob Kummerow <jkummerow@chromium.org>
Cr-Commit-Position: refs/heads/master@{#66765}