• bbudge's avatar
    [V8] Implement SIMD Boolean vector types to allow mask registers. · 9fe0b4c7
    bbudge authored
    - Adds new machine types SimdBool4/8/16 for the different boolean vector types.
    - Adds a kSimdMaskRegisters flag for each platform. These are all false for now.
    - Removes Create, ExtractLane, ReplaceLane, Equal, NotEqual, Swizzle and Shuffle
      opcodes from the Boolean types. These are unlikely to be well supported natively,
      and can be synthesized using Select.
    - Changes the signature of Relational opcodes to return boolean vectors.
    - Changes the signature of Select opcodes to take boolean vectors.
    - Updates the ARM implementation of Relational and Select opcodes.
    
    LOG=N
    BUG=v8:4124
    
    Review-Url: https://codereview.chromium.org/2700813002
    Cr-Commit-Position: refs/heads/master@{#43348}
    9fe0b4c7
instruction-selector-ppc.cc 68.6 KB